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OPTION_REG Scheda tecnica(PDF) 212 Page - Microchip Technology |
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OPTION_REG Scheda tecnica(HTML) 212 Page - Microchip Technology |
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212 / 222 page ![]() MCP19111 DS22331A-page 212 2013 Microchip Technology Inc. F Features Microcontroller .............................................................. 1 Miscellaneous ............................................................. 19 Protection .................................................................... 18 Synchronous Buck ........................................................ 1 Firmware Instructions........................................................ 191 Flash Program Memory Control ........................................ 103 Operation During Code Protect................................. 107 Operation during write Protect .................................. 107 Protecting .................................................................. 107 Reading..................................................................... 106 Writing to ................................................................... 107 Flash Program Memory Control Registers........................ 104 H High-Side Drive Strength .................................................... 47 I I/O Ports.......................................................................... 109 I2C Mode (MSSPx) Acknowledge Sequence ........................................... 150 Acknowledge Sequence Timing................................ 174 Associated Registers ................................................ 180 Bus Collision During a Repeated Start Condition ................... 178 During a Start Condition.................................... 176 During a Stop Condition.................................... 179 Effects of a Reset...................................................... 175 I2C Clock Rate w/BRG .............................................. 181 Master Mode ............................................................. 167 Clock Arbitration................................................ 167 Operation .......................................................... 167 Reception.......................................................... 172 Start Condition Timing .............................. 168, 169 Transmission..................................................... 170 Multi-Master Communication, Bus Collision and Arbitration.......................................................... 175 Multi-Master Mode .................................................... 175 Operation .................................................................. 148 Overview ................................................................... 146 Read/Write Bit Information (R/W Bit) ........................ 151 Slave Mode 10-bit Address Reception.................................. 161 Bus Collision ..................................................... 157 Clock Synchronization ...................................... 165 General Call Address Support .......................... 166 Operation .......................................................... 151 SSPMSKx Register........................................... 166 Transmission..................................................... 157 Sleep Operation ........................................................ 175 Stop Condition Timing............................................... 174 In-Circuit Serial Programming (ICSP) ............................... 189 Common Programming Interfaces ............................ 189 Indirect Addressing ............................................................. 76 Input .................................................................................... 22 Type ............................................................................ 10 Under Voltage Lockout ......................................... 18, 35 Instruction Format ............................................................. 191 Instruction Set ................................................................... 191 ADDLW ..................................................................... 193 ADDWF ..................................................................... 193 ANDLW ..................................................................... 193 ANDWF ..................................................................... 193 MOVF ....................................................................... 196 BCF .......................................................................... 193 BSF........................................................................... 193 BTFSC ...................................................................... 193 BTFSS ...................................................................... 194 CALL......................................................................... 194 CLRF ........................................................................ 194 CLRW ....................................................................... 194 CLRWDT .................................................................. 194 COMF ....................................................................... 194 DECF ........................................................................ 194 DECFSZ ................................................................... 195 GOTO ....................................................................... 195 INCF ......................................................................... 195 INCFSZ..................................................................... 195 IORLW ...................................................................... 195 IORWF...................................................................... 195 MOVLW .................................................................... 196 MOVWF .................................................................... 196 NOP .......................................................................... 196 RETFIE ..................................................................... 197 RETLW ..................................................................... 197 RETURN................................................................... 197 RLF ........................................................................... 198 RRF .......................................................................... 198 SLEEP ...................................................................... 198 SUBLW ..................................................................... 198 SUBWF..................................................................... 199 SWAPF ..................................................................... 199 XORLW .................................................................... 199 XORWF .................................................................... 199 Summary Table ........................................................ 192 Internal Sampling Switch (RSS) IMPEDANCE ...................... 129 Internal Synchronous Driver ............................................... 15 Internal Temperature Indicator Module............................. 121 Circuit Operation....................................................... 121 Temperature Output ................................................. 121 Internal Temperature Measurement Control....................... 49 Internet Address ............................................................... 217 Interrupt-On-Change......................................................... 119 Interrupt-on-Change Associated Registers ................................................ 120 Clearing Interrupt Flags ............................................ 119 Enabling the Module ................................................. 119 Operation in Sleep .................................................... 119 Pin Configuration ...................................................... 119 Registers .................................................................. 120 Interrupts ADC .......................................................................... 126 Associated Registers .................................................. 97 Context Saving ........................................................... 98 Control Registers ........................................................ 93 RA2/INT ...................................................................... 91 TMR1 ........................................................................ 136 L Linear Regulators ............................................................... 15 |
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