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OPTION_REG Scheda tecnica(PDF) 215 Page - Microchip Technology

Il numero della parte OPTION_REG
Spiegazioni elettronici  Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver
PDF  222 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
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OPTION_REG Scheda tecnica(HTML) 215 Page - Microchip Technology

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DS22331A-page 215
MCP19111
T
T1CON Register ............................................................... 136
T1CKPS1:T1CKPS0 Bits ............................................ 44
Temperature Indicator Module .......................................... 121
Thermal Specifications........................................................ 26
Timer Requirements
RESET, Watchdog Timer, Oscillator Start-up Timer and
Power-up ............................................................ 30
Timer0 ....................................................................... 133, 139
8-Bit Counter Mode ................................................... 133
8-bit Timer Mode ....................................................... 133
Associated Registers ................................................ 134
External Clock........................................................... 134
Operation .................................................................. 133
Operation During Sleep ............................................ 134
T0CKI........................................................................ 134
Timer0 Module .................................................................. 133
Timer1 ............................................................................... 135
Associated Registers ................................................ 137
Associated registers.................................................. 137
Clock Source Selection............................................. 135
Control Register ........................................................ 136
Interrupt..................................................................... 136
Operation .................................................................. 135
Operation During Sleep ............................................ 136
Prescaler................................................................... 136
Sleep......................................................................... 136
TMR1H Register ....................................................... 135
TMR1L Register........................................................ 135
Timer1 Module .................................................................. 135
Timer2
Associated registers.................................................. 139
Control Register ........................................................ 139
Operation .................................................................. 138
Timer2 Module .................................................................. 138
Timer2/4/6
Associated Registers ................................................ 139
Timers
Timer1
T1CON.............................................................. 136
Timer2/4/6
TXCON ............................................................. 139
Timing Diagrams
Acknowledge Sequence ........................................... 174
Baud Rate Generator with Clock Arbitration ............. 168
BRG Reset Due to SDA Arbitration During Start
Condition........................................................... 177
Bus Collision During a Repeated Start Condition
(Case 1) ............................................................ 178
Bus Collision During a Repeated Start Condition
(Case 2) ............................................................ 178
Bus Collision During a Start Condition (SCL = 0) ..... 177
Bus Collision During a Stop Condition (Case 1) ....... 179
Bus Collision During a Stop Condition (Case 2) ....... 179
Bus Collision During Start Condition (SDA only) ...... 176
Bus Collision for Transmit and Acknowledge............ 175
Capture/Compare/PWM.............................................. 31
Clock Synchronization .............................................. 165
First Start Bit Timing ................................................. 168
I2C Master Mode (7 or 10-Bit Transmission) ............ 171
I2C Master Mode (7-Bit Reception)........................... 173
I2C Stop Condition Receive or Transmit Mode ......... 174
INT Pin Interrupt.......................................................... 92
Power-up Timer .......................................................... 29
Repeat Start Condition.............................................. 169
Reset .......................................................................... 29
Start-up Timer............................................................. 29
Time-out Sequence
Case 1 ................................................................ 85
Case 2 ................................................................ 86
Case 3 ................................................................ 86
Timer0 ........................................................................ 30
Timer1 ........................................................................ 30
Wake-up from Interrupt............................................. 100
Watchdog Timer ......................................................... 29
Timing Parameter Symbology ............................................ 27
Timing Requirements
CLKOUT and I/O ........................................................ 29
External Clock ............................................................ 28
TRISA Register................................................................. 112
TRISGPA .......................................................................... 110
TRISGPA Register............................................................ 110
TRISGPB Register.................................................... 114, 115
TXCON (Timer2/4/6) Register .......................................... 139
Typical Application Circuit..................................................... 7
Typical Performance Curves .............................................. 51
U
Under Voltage Lockout
Input............................................................................ 35
Unity Gain Buffer ................................................................ 56
V
Voltage For Zero Current.................................................... 40
W
Watchdog Timer (WDT).............................................. 85, 101
Associated Registers................................................ 102
Configuration Word w/ Watchdog Timer................... 102
Operation .................................................................. 101
Period ....................................................................... 101
Programming Considerations ................................... 101
WCOL ....................................................... 168, 170, 172, 174
WCOL Status Flag.................................... 168, 170, 172, 174
WPUB Register................................................................. 112
WPUGPB Register ........................................................... 116
WWW Address ................................................................. 217
WWW, On-Line Support ....................................................... 5



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