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ADP3170 Scheda tecnica(PDF) 7 Page - Analog Devices |
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ADP3170 Scheda tecnica(HTML) 7 Page - Analog Devices |
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7 / 16 page ![]() REV. 0 ADP3170 –7– THEORY OF OPERATION The ADP3170 uses a current-mode, constant off-time control technique to switch a pair of external N-channel MOSFETs in a synchronous buck topology. Constant off-time operation offers several performance advantages, including that no slope compensation is required for stable operation. A unique feature of the constant off-time control technique is that since the off- time is fixed, the converter’s switching frequency is a function of the ratio of input voltage to output voltage. The fixed off- time is programmed by the value of an external capacitor connected to the CT pin. The on-time varies in such a way that a regulated output voltage is maintained as described below in the cycle-by-cycle operation. Under fixed operating conditions the on-time does not vary, and it varies only slightly as a function of load. This means that switching frequency is fairly constant in standard VRM applications. Active Voltage Positioning The output voltage is sensed at the CS– pin. A voltage error amplifier, (gm), amplifies the difference between the output voltage and a programmable reference voltage. The reference voltage is programmed to between 1.05 V and 1.825 V by an internal 5-bit DAC, which reads the code at the voltage identifi- cation (VID) pins. (Refer to Table I for output voltage vs. VID pin code information.) A unique supplemental regulation tech- nique called Analog Devices Optimal Positioning Technology (ADOPT) adjusts the output voltage as a function of the load current so that it is always optimally positioned for a load transient. Standard (passive) voltage positioning, sometimes recommended for use with other architectures, has poor dynamic performance that renders it ineffective under the stringent repetitive transient conditions specified in Intel VRM documents. Consequently, such techniques do not allow the minimum possible number of output capacitors to be used. ADOPT, as used in the ADP3170, provides a bandwidth for transient response that is limited only by parasitic output inductance. This yields optimal load transient response with the minimum number of output capacitors. Reference Output A 3.0 V reference is available on the ADP3170. This reference is normally used to accurately set the voltage positioning using a resistor divider to the COMP pin. In addition, the reference can be used for other functions such as generating a regulated volt- age with an external amplifier. The reference is bypassed with a 1 nF capacitor to ground. It is not intended to drive larger capacitive loads, and it should not be used to provide more than 300 µA of output current. Cycle-by-Cycle Operation During normal operation (when the output voltage is regu- lated), the voltage error amplifier and the current comparator are the main control elements. During the on-time of the high side MOSFET, the current comparator monitors the voltage between the CS+ and CS– pins. When the voltage level between the two pins reaches the threshold level, the DRVH output is switched to ground, which turns off the high side MOSFET. The timing capacitor CT is then charged at a rate determined by the off-time controller. While the timing capacitor is charging, the DRVL output goes high, turning on the low side MOSFET. When the voltage level on the timing capacitor has charged to the upper threshold voltage level, a comparator resets a latch. The output of the latch forces the low side drive output to go low and the high side drive output to go high. As a result, the low side switch is turned off and the high side switch is turned on. The sequence is then repeated. As the load current increases, the output voltage starts to decrease. This causes an increase in the output of the voltage-error amplifier, which, in turn, leads to an increase in the current comparator threshold, thus tracking the load current. To prevent cross conduction of the external MOSFETs, feed- back is incorporated to sense the state of the driver output pins. Before the low side drive output can go high, the high side drive output must be low. Likewise, the high side drive output is unable to go high while the low side drive output is high. Output Crowbar An added feature of using an N-channel MOSFET as the syn- chronous switch is the ability to crowbar the output with the same MOSFET. If the output voltage is 20% greater than the targeted value, the ADP3170 will turn on the lower MOSFET, which will current-limit the source power supply or blow its fuse, pull down the output voltage, and thus save the microprocessor from destruction. The crowbar function releases at approxi- mately 50% of the nominal output voltage. For example, if the output is programmed to 1.5 V, but is pulled up to 1.85 V or above, the crowbar will turn on the lower MOSFET. If in this case the output is pulled down to less than 0.75 V, the crowbar will release, allowing the output voltage to recover to 1.5 V if the fault condition has been removed. Onboard Linear Regulator Controller The ADP3170 includes a linear regulator controller to provide a low cost solution for generating an additional supply rail. This regulator is internally set to 1.8 V with ±2.8% accuracy. The output voltage is sensed by the high input impedance LRFB pin and compared to an internal fixed reference. The LRDRV pin controls the gate of an external N-channel MOSFET resulting in a negative feedback loop. The only additional components required are a capacitor and resistor for stability. Higher output voltages can be generated by placing a resistor divider between the linear regulator output and its LRFB pin. The maximum output load current is determined by the size and thermal impedance of the external power MOSFET that is placed in series with the supply and controlled by the ADP3170. APPLICATION INFORMATION Specifications for a Design Example The design parameters for a typical VRM 8.5-compliant Pentium III application (shown in Figure 3) are as follows: Input voltage: (VIN) = 5 V Auxiliary input: (VCC) = 12 V VID setting voltage: (VOUT) = 1.8 V Nominal output voltage at no load (VONL) = 1.845 V Nominal output voltage at maximum load (VOFL) = 1.771 V Static output voltage drop based on a 3.2 mW load line (ROUT) from no load to full load (V∆) = VONL – VOFL = 1.845 V – 1.771 V = 74 mV Maximum output current (IO[MAX]) = 23 A |
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