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ADV601

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Multiplexed Philips Video Timing

The diagrams in this section show transfer timing for pixel (YCrCb) data in Multiplexed Philips video mode. For line (horizontal)

and frame (vertical) data transfer timing, see the Gray Scale/Philips Video Timing section. All output values assume a maximum pin

loading of 50 pF. Note that in timing diagrams for Multiplexed Philips video, the label CTRL indicates the VSYNC, HSYNC and

FIELD pins. Also note that for Multiplexed Philips mode the CREF pin is unused.

Table XXIX. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Timing Parameters

Parameter

Description

Min

Max

Unit

tVDATA_DMM_D

VDATA Bus, Decode Master Multiplexed Philips, Delay

N/A

tVDATA_DMM_OH

VDATA Bus, Decode Master Multiplexed Philips, Output Hold

N/A

tCTRL_DMM_D

CTRL Signals, Decode Master Multiplexed Philips, Delay

N/A

tCTRL_DMM_OH

CTRL Signals, Decode Master Multiplexed Philips, Output Hold

N/A

(O) CTRL

(O) VCLKO

CTRL_DMM_OH

(O) VDATA

VDATA_DMM_OH

VDATA_DMM_D

VALID

CTRL_DMM_D

VALID

Figure 33. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Transfer Timing

Table XXX. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Timing Parameters

Parameter

Description

Min

Max

Unit

tVDATA_DSM_D

VDATA Bus, Decode Slave Multiplexed Philips, Delay

N/A

tVDATA_DSM_OH

VDATA Bus, Decode Slave Multiplexed Philips, Output Hold

N/A

tCTRL_DSM_S

CTRL Signals, Decode Slave Multiplexed Philips, Setup

N/A

tCTRL_DSM_H

CTRL Signals, Decode Slave Multiplexed Philips, Hold

N/A

(I) CTRL

(O) VCLKO

(O) VDATA

CTRL_DSM_H

VALID

VDATA_DSM_OH

VALID

VDATA_DSM_D

CTRL_DSM_S

Figure 34. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Transfer Timing

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