Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

WM9090ECS/R Scheda tecnica(PDF) 71 Page - Wolfson Microelectronics plc

Il numero della parte WM9090ECS/R
Spiegazioni elettronici  Ultra Low Power Audio Subsystem
PDF  81 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  WOLFSON [Wolfson Microelectronics plc]
Homepage  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM9090ECS/R Scheda tecnica(HTML) 71 Page - Wolfson Microelectronics plc

Back Button WM9090ECS/R Datasheet HTML 67Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 68Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 69Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 70Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 71Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 72Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 73Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 74Page - Wolfson Microelectronics plc WM9090ECS/R Datasheet HTML 75Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 71 / 81 page
background image
Production Data
WM9090
w
PD, November 2010, Rev 4.1
71
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
3
HPOUT1R_RM
V_SHORT
0
Removes HPOUT1R short
0 = HPOUT1R short enabled
1 = HPOUT1R short removed
For pop-free operation, this bit should be set to 1 as the
final step in the HPOUTR Enable sequence.
2
HPOUT1R_OU
TP
0
Enables HPOUT1R output stage
0 = Disabled
1 = Enabled
For pop-free operation, this bit should be set to 1 after
the DC offset cancellation has been performed.
1
HPOUT1R_DL
Y
0
Enables HPOUT1R intermediate stage
0 = Disabled
1 = Enabled
For pop-free operation, this bit should be set to 1 after
the output signal path has been configured, and before
the DC Offset cancellation is scheduled This bit should
be set with at least 20us delay after HPOUT1L_ENA.
Register 60h Analogue HP 0
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R98 (62h)
AGC Control
0
15
AGC_CLIP_EN
A
1
Enable AGC Anti-Clip Mode
0 = Disabled
1 = Enabled
11:8
AGC_CLIP_TH
R [3:0]
0110
AGC Anti-Clip Threshold
Sets the headroom between SPKPGA output and
SPKVDD at which Anti-Clip limiting will be applied
0000 = -200mV
0001 = -150mV
0010 = -100mV
0011 = -50mV
0100 = 0mV
0101 = 50mV
0110 = 100mV
0111 = 150mV
1000 = 200mV
1001 = 250mV
1010 = 300mV
1011 = 400mV
1100 = 500mV
1101 = 600mV
1110 = 700mV
1111 = 800mV
6:4
AGC_CLIP_AT
K [2:0]
100
AGC Anti-Clip Attack Rate
Sets the rate of AGC gain reduction when clipping is
detected
000 = 0.6ms/6dB
001 = 5.4ms/6dB
010 = 10.2ms/6dB
011 = 15.0ms/6dB
100 = 19.8ms/6dB
101 = 24.6ms/6dB
110 = 29.4ms/6dB
111 = 34.1ms/6dB



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com