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EPC2 Scheda tecnica(PDF) 12 Page - Altera Corporation

Il numero della parte EPC2
Spiegazioni elettronici  Configuration Devices for SRAM-Based LUT Devices
PDF  26 Pages
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Produttore elettronici  ALTERA [Altera Corporation]
Homepage  http://www.altera.com
Logo ALTERA - Altera Corporation

EPC2 Scheda tecnica(HTML) 12 Page - Altera Corporation

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Page 12
Programming and Configuration File Support
Configuration Devices for SRAM-Based LUT Devices
January 2012
Altera Corporation
Programming and Configuration File Support
The Quartus II and MAX+PLUS II softwares provide programming support for Altera
configuration devices. During compilation, the Quartus II and MAX+PLUS II
softwares automatically generates a .pof, which is used to program the configuration
devices. In a multi-device configuration, the software combines the programming
files for multiple ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II,
FLEX 10K, Mercury, Stratix, Stratix GX, Stratix II, and Stratix II GX devices into one or
more configuration devices. The software allows you to select the appropriate
configuration device to store the data for each FPGA.
All Altera configuration devices are programmable using Altera programming
hardware in conjunction with the Quartus II or MAX+PLUS II software. In addition,
many third-party programmers offer programming hardware that supports Altera
configuration devices.
1 An EPC2 device can be programmed with a .pof generated for an EPC1 or EPC1441
device. An EPC1 device can be programmed with a .pof generated for an EPC1441
device.
EPC2 configuration devices can be programmed in-system through its
industry-standard four-pin JTAG interface. ISP capability in the EPC2 devices provide
ease in prototyping and FPGA functionality. When programming multiple EPC2
devices in a JTAG chain, the Quartus II and MAX+PLUS II softwares and other
programming methods employ concurrent programming to simultaneously program
multiple devices and reduce programming time. EPC2 devices can be programmed
and erased up to 100 times.
After programming an EPC2 device in-system, FPGA configuration is initiated by the
INIT
_CONF JTAG instruction of the EPC2 device. For more information, refer to
Table 6.
f For more information about programming and configuration support, refer to the
following documents:
■
Altera Programming Hardware Data Sheet
■
USB-Blaster Download Cable User Guide
■
MasterBlaster Serial/USB Communications Cable User Guide
■
ByteBlaster II Download Cable User Guide
■
ByteBlasterMV Download Cable User Guide
■
BitBlaster Serial Download Cable Data Sheet
You can also program the configuration devices using the Quartus II or MAX+PLUS II
software with the APU or the appropriate configuration device programming adapter.



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