CDPCLK7 datasheet(240/274 Pages) ALTERA

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Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family

Remote System Upgrade

Cyclone III Device Handbook

August 2012

Altera Corporation

Volume 1

The control register bit positions are shown in Figure 9–36 and listed in Table 9–27. In

the figure, the numbers show the bit position of a setting in a register. For example, bit

number 35 is the enable bit for the watchdog timer.

When enabled, the early CONF_DONE check (Cd_early) option bit ensures that there is a

valid configuration at the boot address specified by the factory configuration and that

it is of the proper size. If an invalid configuration is detected or CONF_DONE pin is

asserted too early, the device resets and then reconfigures the factory configuration

image. The internal oscillator, as startup state machine clock (Osc_int) option bit,

ensures a functional startup clock to eliminate the hanging of startup when enabled.

When all option bits are turned on, they provide complete coverage for the

programming and startup portions of the application configuration. It is strongly

recommended that you turn on both the Cd_early and Osc_int option bits.

1 The Cd_early and Osc_int option bits for the application configuration must be

turned on by the factory configuration.

Remote System Upgrade Status Register

The remote system upgrade status register specifies the reconfiguration trigger

condition. The various trigger and error conditions include:

■

Cyclical redundancy check (CRC) error during application configuration

■ nSTATUS

assertion by an external device due to an error

Figure 9–36. Remote System Upgrade Control Register

Rsv2

Cd_early Osc_int Wd_en Rsv1

Ru_address[21..0] Wd_timer[11..

34 33

12 11

Table 9–27. Remote System Upgrade Control Register Contents

Control Register Bit

Value

Definition

Wd_timer[11..0]

12'b000000000000

User watchdog time-out value (most significant 12 bits of

29-bit count value:

{Wd_timer[11..0],17'b1000}

)

Ru_address[21..0]

22'b0000000000000000000000

Configuration address (most significant 22 bits of 24-bit

boot address value:

boot_address[23:0]

= {Ru_address[21..0],2'b0})

Rsv1

1'b0

Reserved bit

Wd_en

1'b1

User watchdog timer enable bit

Osc_int (1)

1’b1

Internal oscillator as startup state machine clock enable bit

Cd_early (1)

1’b1

Early CONF_DONE check

Rsv2

1'b1

Reserved bit

Note to Table 9–27:

(1) Option bit for the application configuration.

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