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ADCLK914BCPZ-R7 Scheda tecnica(PDF) 10 Page - Analog Devices

Il numero della parte ADCLK914BCPZ-R7
Spiegazioni elettronici  Ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer
PDF  12 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADCLK914BCPZ-R7 Scheda tecnica(HTML) 10 Page - Analog Devices

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ADCLK914
Rev. A | Page 10 of 12
TYPICAL APPLICATION CIRCUITS
VREF
VCC
VT
D
D
CONNECT VT TO VCC.
Figure 15. Interfacing to CML Inputs
VREF
VT
D
D
NOTES
1. PLACING A BYPASS CAPACITOR
FROM VT TO GROUND CAN IMPROVE
THE NOISE PERFORMANCE.
CONNECT VT TO VREF.
Figure 16. AC Coupling Differential Signals
VEE
40mA
VEE
7mA
VEE
7mA
Q
Q
VCC
Figure 17. Interfacing to High Speed DAC
VREF
VCC – 2V
VT
D
D
CONNECT VT TO VCC – 2V.
Figure 18. Interfacing to ECL Inputs
VREF
VT
D
D
CONNECT VT, VREF, AND D. PLACE A BYPASS
CAPACITOR FROM VT TO GROUND.
ALTERNATIVELY, VT, VREF, AND D CAN BE
CONNECTED, GIVING A CLEANER LAYOUT AND
A 180º PHASE SHIFT.
Figure 19. Interfacing to AC-Coupled, Single-Ended Inputs



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