THS3115IPWPRG4 datasheet(14/35 Pages) TI1

14 / 35 page

1nF

24.9 W

-V

5.11 W

24.9 W

-V

5.11 W

49.9

-V

5.11 W

-V

5.11 W

THS3112

THS3115

SLOS385C – SEPTEMBER 2001 – REVISED SEPTEMBER 2010

www.ti.com

Figure 48 shows a configuration that uses two

Saving Power with Shutdown Functionality

amplifiers in parallel to double the output drive current

and Setting Threshold Levels with the

to larger capacitive loads. This technique is used

Reference Pin

when more output current is needed to charge and

The

THS3115

features

shutdown

discharge the load faster as when driving large FET

(SHUTDOWN) that lowers the quiescent current from

transistors.

4.9 mA/amp down to 300 µA/amp, ideal for reducing

system power.

The shutdown pin of the amplifier defaults to the REF

pin voltage in the absence of an applied voltage,

putting the amplifier in the normal on mode of

operation. To turn off the amplifier in an effort to

conserve power, the shutdown pin can be driven

towards the positive rail. The threshold voltages for

power-on and power-down (or shutdown) are relative

to the supply rails and are given in the Shutdown

Characteristics table. Below the Enable threshold

voltage, the device is on. Above the Disable threshold

voltage, the device is off. Behavior between these

threshold voltages is not specified.

Note that this shutdown functionality is self-defining:

the amplifier consumes less power in shutdown

mode. The shutdown mode is not intended to provide

high-impedance

output.

other

words,

the

shutdown functionality is not intended to allow use as

Figure 48. Parallel Amplifiers for Higher Output

a 3-state bus driver. When in shutdown mode, the

Drive

impedance looking back into the output of the

amplifier is dominated by the feedback and gain

setting resistors, but the output impedance of the

Figure 49 shows a push-pull FET driver circuit typical

device itself varies depending on the voltage applied

of ultrasound applications with isolation resistors to

to the outputs.

isolate the gate capacitance from the amplifier.

As with most current feedback amplifiers, the internal

architecture places some limitations on the system

when in shutdown mode. Most notably is the fact that

the amplifier actually turns on if there is a ±0.7 V or

greater difference between the two input nodes (IN+

and IN–) of the amplifier. If this difference exceeds

±0.7 V, the output of the amplifier creates an output

voltage equal to approximately [(IN+ – IN–) – 0.7V] ×

Gain. Also, if a voltage is applied to the output while

in shutdown mode, the IN– node voltage is equal to

VO(applied) × RG/(RF + RG) . For low gain configurations

and a large applied voltage at the output, the

amplifier may actually turn on because of the

behavior described here.

The time delays associated with turning the device on

and off are specified as the time it takes for the

amplifier to reach either 10% or 90% of the final

output voltage. The time delays are in the order of

microseconds because the amplifier moves in and out

Figure 49. PowerFET Drive Circuit

of the linear mode of operation in these transitions.

space

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