ADRF6620ACPZ-R7 datasheet(37/52 Pages) AD

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Data Sheet

ADRF6620

Rev. 0 | Page 37 of 52

Maintaining the same third-order Chebyshev filter design shown

in Figure 91, the component values can be tuned to optimize

performance with some trade-offs. To achieve maximally flat pass-

band response, the trade-off is signal bandwidth (see Figure 92).

The L3 and L4 inductors are replaced with 47 nH, and the

capacitors are not populated. This configuration results in the

flattest pass-band ripple; however, the signal bandwidth starts to

roll off at 300 MHz. A narrower bandwidth translates to more

attenuation of the mixer sum and LO leakage, which is a desirable

effect if the wider signal bandwidth is not a requirement. Use the

results shown in Figure 92 only as a guide, and design the interstage

filter to the specific PCB board conditions. The plots in Figure 92

were measured using the ADRF6620 evaluation board.

100

150

200

250

300

350

400

450

500

IF FREQUENCY (MHz)

L3 = L4 = 47nH, C1 = C2 = OPEN

L3 = L4 = 39nH, C1 = C2 = OPEN

L3 = L4 = 24nH, C1 = 0.8pF, C2 = 1pF

Figure 92. Interstage Filter Design Trade-Offs

Because the capacitance of the ADRF6620 evaluation board

closely approximates the C1 and C2 capacitors, they can be

removed from the design. However, this may not be the case

for every PCB design with different stack-ups.

Figure 93 compares the OIP3 and OIP2 performance of the

ADRF6620 with and without filtering at the mixer output.

100

150

200

250

300

350

400

450

500

IF FREQUENCY (MHz)

OIP3 WITH NO FILTER

OIP3 WITH FILTER

OIP2 WITH NO FILTER

OIP2 WITH FILTER

Figure 93. OIP2/OIP3 Performance With and Without Filtering at

the DGA Output; RF Frequency = 900 MHz; High-Side LO Injection, LO Sweep

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