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MP2007 Scheda tecnica(PDF) 6 Page - Monolithic Power Systems |
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MP2007 Scheda tecnica(HTML) 6 Page - Monolithic Power Systems |
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6 / 11 page ![]() MP2007 – 3A, 1.3V-6.0V INPUT, DDR MEMORY TERMINATION REGUALTOR MP2007 Rev. 0.9 www.MonolithicPower.com 6 7/23/2009 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2009 MPS. All Rights Reserved. TYPICAL PERFORMANCE CHARACTERISTICS (continued) C1=C2=C3=10uF, C4 =C6=0.1uF, C7=4.7uF, VDRV=5V, TA=25ºC unless otherwise noted. . 20us/div 200us/div 20us/div Enable On VDDQ=VREF=2.5V, VTT=1.25V Enable Off VDDQ=VREF=2.5V, VTT=1.25V 100us/div VTT 0.5V/div. ITT 2A/div. VTT 0.5V/div. ITT 2A/div. VTT 10V/div. VEN 2V/div. VDDQ 2V/div. ITT 1A/div. VTT 10V/div. VEN 2V/div. VDDQ 2V/div. ITT 1A/div. Short Circuit VDDQ=VREF=2.5V, VTT=1.25V Short Circuit Recovery VDDQ=VREF=2.5V, VTT=1.25V Input Supply Current vs. Temp VDDQ=VREF=1.8V, VTT=0.9V Shut Down Input Current vs. Temp VDDQ=VREF=.8V, VTT=0V 0.0 0.4 0.8 1.2 1.6 2.0 -40 -10 20 50 80 110 140 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 -40 -10 20 50 80 110 140 |
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