MPQ8632-20 datasheet(22/46 Pages) MPS

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MPQ8632 HIGH EFFICIENCY 18V SYNCHRONOUS STEP-DOWN CONVERTER FAMILY FOR 4A TO 20A

MPQ8632 Rev.1.24

www.MonolithicPower.com

8/28/2013

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

reasonable that the jitter in skip mode is larger

To achieve less jitter during ultra light load

condition, reduce R1 and R2, but that will

decrease the light load efficiency.

Configuring the EN Control

The regulator turns on when En goes high;

conversely it turns off when EN goes low. Do not

float the pin.

For automatic start-up, pull the EN pin up to input

voltage through a resistive

voltage

divider.

Choose the values of the pull-up resistor (RUP

from the IN pin to the EN pin) and the pull-down

resistor (RDOWN from the EN pin to GND) to

determine the automatic start-up voltage:

DOWN

IN START

DOWN

)

1.5

(V)







(11)

For example, for RUP=100kΩ and RDOWN=51kΩ,

the VIN-START is set at 4.44V.

To reduce noise, add a 10nF ceramic capacitor

from EN to GND.

An internal zener diode on the EN pin clamps the

EN pin voltage to prevent run away. The

maximum pull up current assuming the worst

case 6V for the internal zener clamp should be

less than 1mA.

Therefore, when driving EN with an external logic

signal, use an EN voltage less than 6V. When

connecting EN to IN through a pull-up resistor or

a resistive voltage divider, select a resistance

that ensures a maximum pull-up current less than

1mA.

If using a resistive voltage divider and VIN

exceeds 6V, then the minimum resistance for the

pull-up resistor RUP should meet:

DOWN

1mA





(12)

With only RUP (the pull-down resistor, RDOWN, is

not connected), then the VCC UVLO threshold

determines VIN-START, so the minimum resistor

value is:

( )

1mA





(13)

A typical pull-

up resistor is 100kΩ.

External VCC bias

An external 5V VCC bias can disable the internal

LDO, in this case, Vin can be as low as 2.5V.

Soft Start

The

MPQ8632

employs

soft

start

(SS)

mechanism to ensure a smooth output during

power-up. When the EN pin goes high, an

internal current source (20

μA) charges the SS

capacitor. The SS capacitor voltage takes over

the REF voltage to the PWM comparator. The

output voltage smoothly ramps up with the SS

voltage. Once the SS voltage reaches the REF

voltage, it continues ramping up while VREF takes

over the PWM comparator. At this point, soft start

finishes and the device enters steady state

operation.

Determine the SS capacitor value as follows:

 



 SS

REF

(14)

If the output capacitors are large, then avoid

setting a short SS time or risk hitting the current

limit during SS. Use a minimum value of 4.7nF if

the output capacitance value exceeds

330μF.

Pre-Bias Startup

The MPQ8632 has been designed for monotonic

startup into pre-biased loads. If the output is pre-

biased to a certain voltage during startup, the IC

will disable switching for both high-side and low-

side switches until the voltage on the soft-start

capacitor exceeds the sensed output voltage at

the FB pin.

Power Good (PG)

The MPQ8632 has a power-good (PG) output.

The PG pin is the open drain of a MOSFET.

Connect it to VCC or some other voltage source

that measures less than 5.5V through a pull-up

resistor (typically 100k

Ω). After applying the input

voltage, the MOSFET turns on so that the PG pin

is pulled to GND before the SS is ready. After the

FB voltage reaches 91% of the REF voltage, the

PG pin is pulled high after a 2.5ms delay.

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