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STM32F407IG Scheda tecnica(PDF) 63 Page - STMicroelectronics |
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STM32F407IG Scheda tecnica(HTML) 63 Page - STMicroelectronics |
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63 / 167 page ![]() STM32F405xx, STM32F407xx Electrical characteristics Doc ID 022152 Rev 2 63/167 5.1.6 Power supply scheme Figure 18. Power supply scheme 1. Each power supply pair must be decoupled with filtering ceramic capacitors as shown above. These capacitors must be placed as close as possible to, or below, the appropriate pins on the underside of the PCB to ensure the good functionality of the device. 2. To connect BYPASS_REG and PDR_ON pins, refer to Section 2.2.17: Real-time clock (RTC), backup SRAM and backup registers. 3. The two 2.2 µF ceramic capacitors should not be connected when the voltage regulator is OFF. 4. The 4.7 µF ceramic capacitor must be connected to one of the VDD pin. 5. VDDA=VDD and VSSA=VSS. |
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