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LPV521 Scheda tecnica(PDF) 6 Page - Texas Instruments

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Il numero della parte LPV521
Spiegazioni elettronici  LPV521 Nanopower, 1.8V, RRIO, CMOS Input, Operational Amplifier
PDF  29 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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LPV521 Scheda tecnica(HTML) 6 Page - Texas Instruments

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LPV521
SNOSB14C – AUGUST 2009 – REVISED FEBRUARY 2013
www.ti.com
5V DC Electrical Characteristics
(1) (continued)
Unless otherwise specified, all limits guaranteed for TA = 25°C, V
+ = 5V, V= 0V, V
CM = VO = V
+/2, and R
L > 1MΩ. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(2)
(3)
(2)
TCVOS
Input Offset Voltage Drift(4)
±0.4
±3.5
μV/°C
IBIAS
Input Bias Current
0.04
±1
pA
±50
IOS
Input Offset Current
60
fA
CMRR
Common Mode Rejection Ratio
0V
≤ VCM ≤ 5.0V
75
102
74
0V
≤ VCM ≤ 3.9V
84
108
dB
80
4.4V
≤ VCM ≤ 5.0V
77
115
76
PSRR
Power Supply Rejection Ratio
1.6V
≤ V+ ≤ 5.5V
85
109
dB
VCM = 0.3V
76
CMVR
Common Mode Voltage Range
CMRR
≥ 75 dB
−0.1
5.1
V
CMRR
≥ 74 dB
0
5
AVOL
Large Signal Voltage Gain
VO = 0.5V to 4.5V
84
132
dB
RL = 100 kΩ to V
+/2
76
VO
Output Swing High
RL = 100 kΩ to V
+/2
3
50
VIN(diff) = 100 mV
50
mV from
either rail
Output Swing Low
RL = 100 kΩ to V
+/2
3
50
VIN (diff) = −100 mV
50
IO
Output Current(5)
Sourcing, VO to V
15
23
VIN(diff) = 100 mV
8
mA
Sinking, VO to V
+
15
22
VIN(diff) = −100 mV
8
IS
Supply Current
VCM = 0.3V
351
400
620
nA
VCM = 4.7V
475
600
870
(4)
The offset voltage average drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
(5)
The short circuit test is a momentary open loop test.
5V AC Electrical Characteristics
(1)
Unless otherwise specified, all limits guaranteed for TA = 25°C, V
+ = 5V, V= 0V, V
CM = VO = V
+/2, and R
L > 1MΩ. Boldface
limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(2)
(3)
(2)
GBW
Gain-Bandwidth Product
CL = 20 pF, RL = 100 kΩ
6.2
kHz
SR
Slew Rate
AV = +1,
Falling Edge
1.1
2.7
VIN = 0V to 5V
1.2
V/ms
Rising Edge
1.1
2.4
1.2
θ m
Phase Margin
CL = 20 pF, RL = 100 kΩ
73
deg
Gm
Gain Margin
CL = 20 pF, RL = 100 kΩ
20
dB
(1)
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which the
device may be permanently degraded, either mechanically or electrically.
(2)
All limits are guaranteed by testing, statistical analysis or design.
(3)
Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production
material.
6
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