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CS43L43 Scheda tecnica(PDF) 32 Page - Cirrus Logic

Il numero della parte CS43L43
Spiegazioni elettronici  Low Voltage,Stereo DAC With Headphone Amp
PDF  36 Pages
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Produttore elettronici  CIRRUS [Cirrus Logic]
Homepage  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS43L43 Scheda tecnica(HTML) 32 Page - Cirrus Logic

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CS43L43
32
DS479PP3
SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE
(Inputs: Logic “0” = GND, Logic “1” = VL.)
7. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.
Parameter
Symbol
Min
Max
Unit
I2C Mode
SCL Clock Frequency
fscl
-100
kHz
RST Rising Edge to Start
tirs
-s
Bus Free Time Between Transmissions
tbuf
4.7
-
µs
Start Condition Hold Time (prior to first clock pulse)
thdst
4.0
-
µs
Clock Low time
tlow
4.7
-
µs
Clock High Time
thigh
4.0
-
µs
Setup Time for Repeated Start Condition
tsust
4.7
-
µs
SDA Hold Time from SCL Falling
(Note 7)
thdd
0-
µs
SDA Setup time to SCL Rising
tsud
250
-
ns
Rise Time of SCL
trc
-25
ns
Fall Time of SCL
tfc
-25
ns
Rise Time SDA
trd
-1
µs
Fall Time of SDA
tfd
-300
ns
Setup Time for Stop Condition
tsusp
4.7
-
µs
1
2
()Fs
---------------
Figure 22. Control Port Timing - I2C Mode
t
buf
t
hdst
t
hdst
t
lo w
t r
t f
t
hdd
t
high
t sud
t sust
t susp
Stop
S ta rt
Sta rt
Stop
R e p eated
SDA
SC L
t
irs
RST



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