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DS80C400 Scheda tecnica(PDF) 2 Page - Dallas Semiconductor |
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DS80C400 Scheda tecnica(HTML) 2 Page - Dallas Semiconductor |
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2 / 97 page ![]() DS80C400 Network Microcontroller 2 of 97 ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Input Pin Relative to Ground……………....………………………………………..-0.5V to +5.5V Voltage Range on Any Output Pin Relative to Ground……....……………………………………..-0.5V to (VCC3 + 0.5)V Voltage Range on VCC3 Relative to Ground…………………………………………………………………..-0.5V to +3.6V Voltage Range on VCC1 Relative to Ground…………………………………………………………………..-0.3V to +2.0V Operating Temperature Range………………………………………………………………………………..-40°C to +85°C Junction Temperature……………………………………………………………………………………………..+150°C max Storage Temperature Range………………………………………………………………………………...-55°C to +160°C Soldering Temperature………………………………………………………….See IPC/JEDEC J-STD-020 Specification Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect device reliability. DC ELECTRICAL CHARACTERISTICS (Note 1) (VCC3 = 3.0V to 3.6V, VCC1 = 1.8V ±10%, TA = -40°C to +85°C.) PARAMETER SYMBOL MIN TYP MAX UNITS Supply Voltage (VCC3) (Note 2) VCC3 3.0 3.3 3.6 V Power-Fail Warning (VCC3) (Note 3) VPFW3 2.85 3.00 3.15 V Power-Fail Reset Voltage (VCC3) (Note 3) VRST3 2.76 2.90 3.05 V Active Mode Current (VCC3) (Note 4) ICC3 16 35 mA Idle Mode Current (VCC3) (Note 4) IIDLE3 7 15 mA Stop Mode Current (VCC3) (Not 4) ISTOP3 1 10 mA Stop Mode Current, Bandgap Enabled (VCC3) (Note 4) ISPBG3 100 150 mA Supply Voltage (VCC1) (Note 2) VCC1 1.62 1.8 1.98 V Power-Fail Warning (VCC1) (Note 5) VPFW1 1.52 1.60 1.68 V Power-Fail Reset Voltage (VCC1) (Note 5) VRST1 1.47 1.55 1.63 V Active Mode Current (VCC1) (Note 4) ICC1 27 50 mA Idle Mode Current (VCC1) (Note 4) IIDLE1 20 40 mA Stop Mode Current (VCC1) (Note 4) ISTOP1 0.2 10 mA Stop Mode Current, Bandgap Enabled (VCC1) (Note 4) ISPBG1 0.2 10 mA Input Low Level VIL1 0.8 V Input Low Level for XTAL1, RST, OW VIL2 1.0 V Input High Level VIH1 2.0 V Input High Level for XTAL1, RST, OW VIH2 2.4 V Output Low Current for Port 1, 3–7 at VOL = 0.4V IOL1 6 10 mA Output Low Current for Port 0, 2, TX_EN, TXD[3:0], MDC, MDIO, RSTOL, ALE, PSEN, and Ports 3–7 (when used as any of the following: A21–A0, WR, RD, CE0-7, PCE0-3) at VOL = 0.4V (Note 6) IOL2 12 20 mA Output Low Current for OW, OWSTP at VOL= 0.4V IOL3 10 16 mA Output High Current for Port 1, 3–7 at VOH = VCC3 - 0.4V (Note 7) IOH1 -75 -50 mA Output High Current for Port 1, 3–7 at VOH= VCC3 - 0.4V (Note 8) IOH2 -8 -4 mA Output High Current for Port 0, 2, TX_EN, TXD[3:0], MDC, MDIO, RSTOL, ALE, PSEN, and Ports 3–7 (when used as any of the following: A21–A0, WR, RD, CE0-7, PCE0-3) at VOH = VCC3 - 0.4V (Notes 6, 9) IOH3 -16 -8 mA Input Low Current for Port 1–7 at 0.4V (Note 10) IIL -50 -20 -10 mA Logic 1-to-0 Transition Current for Port 1, 3–7 (Note 11) ITL -650 -400 mA Input Leakage Current, Port 0 Bus Mode, VIL = 0.8V (Note 12) ITH0 20 50 200 mA Input Leakage Current, Port 0 Bus Mode, VIH = 2.0V (Note 12) ITL0 -200 -50 -20 mA Input Leakage Current, Input Mode (Note 13) IL -15 0 15 mA RST Pulldown Resistance RRST 50 100 200 k W Note 1: Specifications to -40°C are guaranteed by design and not production tested. Note 2: The user should note that this part is tested and guaranteed to operate down to VCC3 = 3.0V and VCC1 = 1.62V, while the reset thresholds for those supplies, VRST3 and VRST1 respectively, may be above or below those points. When the reset threshold for a given supply is greater than the guaranteed minimum operating voltage, that reset threshold should be considered the minimum operating point since execution ceases once the part enters the reset state. When the reset threshold for a given supply is lower than the guaranteed minimum operating voltage, there exists a range of voltages for either supply, (VRST3 < VCC3 < 1.62V) or (VRST1 < VCC1 < 3.0V), where the processor’s operation is not guaranteed, and the reset trip point has not been reached. This should not be an issue in |
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