Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

ZIOL2102 Scheda tecnica(PDF) 85 Page - List of Unclassifed Manufacturers

Il numero della parte ZIOL2102
Spiegazioni elettronici  IO-Link compliant HV Line Driver IC Family
PDF  91 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  ETC2 [List of Unclassifed Manufacturers]
Homepage  
Logo ETC2 - List of Unclassifed Manufacturers

ZIOL2102 Scheda tecnica(HTML) 85 Page - List of Unclassifed Manufacturers

Back Button ZIOL2102 Datasheet HTML 81Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 82Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 83Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 84Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 85Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 86Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 87Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 88Page - List of Unclassifed Manufacturers ZIOL2102 Datasheet HTML 89Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 85 / 91 page
background image
ZIOL2xxx – IC Family
IO-Link compliant HV Line Driver IC Family
Data Sheet
January 31, 2012
© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 2.2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is PRELIMINARY and subject to
changes without notice.
85 of 90
over-current (OVT) exception
Bit[2]:
Reset the AUX COM over-current counter and reset of the internal and stored
AUX over-current (OVT) exception
Bit[3]:
Reset of the stored WURQ exception
Figure 10.5 Partial Reset of Overload Counter or the entire Lock circuit
Channel
Driver
unlocked
Over-load /
Over-temp
Reg[20]
Peak Counter
Reg[21:25]
Overload
Counter
Stored
Exception
Reg[18]
INT_L
Lock Reset
(lock counter
elapsed)
Assert time
Exception
(state signal)
Reg[20]
By „Read & Clear“ reset of
the peak counter
Assert time expired,
exception causes
INT_L = 0 (if configured)
unlocked
locked
monitored physical value exceeds the configured limit
time
time
time
time
time
time
overload counter
equals configured limit
Configured
Lock time
Write Pulse to Reg[16] or reg[17] will
reset the overload counter only since
there is no exception present
Write Pulse to
Reg[16] = reset lock circuit
A write pulse access to register [17] works similar but performs only a partial reset of the overload counter as in
the following described:



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com