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ML7344J Scheda tecnica(PDF) 39 Page - List of Unclassifed Manufacturers |
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ML7344J Scheda tecnica(HTML) 39 Page - List of Unclassifed Manufacturers |
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39 / 151 page ![]() FEDL7344C/E/J-04 ML7344C/E/J 39/151 ●CRC function ML7344 has CRC32,CRC16 and CRC8 function. CRC is calculated and appended to TX data. CRC is checked for RX data. The following modes are used for automatic CRC function. ●FIFO mode: RXDIO_CTRL ([DIO_SET: B0 0x0C(7-6)]) = 0b00 ●DIO mode: RXDIO_CTRL ([DIO_SET: B0 0x0C(7-6)]) = 0b11 Function Control bit name / Register TX CRC setting TX_CRC_EN([PKT_CTRL2: B0 0x05(2)]) RX CRC setting RX_CRC_EN([PKT_CTRL2: B0 0x05(3)]) CRC length setting CRC_LEN([PKT_CTRL2: B0 0x05(5-4)]) CRC complement value OFF setting CRC_COMP_OFF([PKT_CTRL2: B0 0x05(6)]) CRC polynomial setting [CRC_POLY3/2/1/0: B1 0x16/17/18/19] registers CRC error status [CRC_ERR_H/M/L: B0 0x13/14/15] registers Any CRC polynomials for CRC32/CRC16/CRC8 can be specified. Reset value is as follows: CRC16 polynomial = x16 + x13 + x12 + x11 + x10 + x8 + x6 + x5 + x2 + 1 (reset value) NOTE: CRC result data can be inverted by CRC complement value OFF setting, CRC data will be generated by the following circuits. By programming [CRC_POLY3/2/1/0] registers, any CRC polynomials can be supported. Generated CRC will be transfer from the most left bit (S15). If data length is shorter than CRC length (3 bytes of CRC32 only), data “0”s will be added for CRC calculation. CRC check result is stored in [CRC_ERR_H/M/L] registers. Unlike Format C, Format A/B can include multiple CRC fields in one packet. For multiple CRCs check results, CRC value closest to L-field will be stored in CRC_ERR[0] ([CRC_ERR_L:B0 0x15(0)]). Subsequent bit will be stored in CRC_ERR from MSB order. NOTE: exclusive OR Fig.4 CRC16 polynomial circuits General CRC polynomial can be programmed by below [CRC_POLY3/2/1/0] register setting. CRC length can be set by CRC_LEN. [CRC_POLY3/2/1/0] CRC polynomial (B1 0x16) (B1 0x17) (B1 0x18) (B1 0x19) CRC8 x 8 + x2 + x + 1 0x00 0x00 0x00 0x03 x 16 + x12 + x5 + 1 0x00 0x00 0x08 0x10 x 16 + x15 + x2 + 1 0x00 0x00 0x40 0x02 CRC16 x 16 + x13 + x12 + x11 + x10 + x8 + x6 + x5 + x2 + 1 0x00 0x00 0x1E 0xB2 CRC32 x 32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x 5 + x4 + x2 + x + 1 0x02 0x60 0x8E 0xDB S0 S1 S2 S14 S15 CRC_POLY [14] CRC_POLY [0] CRC_POLY [1] CRC_POLY [13] Input Data |
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