HT48C50- datasheet(21/45 Pages) HOLTEK

21 / 45 page

HT48C50-1

June 14, 2000

Preliminary

After a chip reset, these input/output lines re-

main at high levels or floating state (depending

on the pull-high options). Each bit of these in-

put/output latches can be set or cleared by "SET

[m].i" and "CLR [m].i" (m=12H, 14H, 16H, 18H

or 1EH) instructions.

Some instructions first input data and then fol-

low the output operations. For example, "SET

[m].i", "CLR [m].i", "CPL [m]", "CPLA [m]" read

the entire port states into the CPU, execute the

defined operations (bit-operation), and then

write the results back to the latches or the accu-

mulator.

Each line of port A has the capability of wak-

ing-up the device. The highest 5-bit of port G are

not physically implemented; on reading them a

"0" is returned whereas writing then results in

no-operation. See Application note.

There is a pull-high option available for all I/O

lines (bit option). Once the pull-high option of

an I/O line is selected, the I/O line have

pull-high resistor. Otherwise, the pull-high re-

sistor is absent. It should be noted that a

non-pull-high I/O line operating in input mode

will cause a floating state.

The PB0 and PB1 are pin-shared with BZ and

BZ signal, respectively. If the BZ/BZ option is

selected, the output signal in output mode of

PB0/PB1 will be the PFD signal generated by

timer/event counter 0 overflow signal. The in-

put mode always remain in its original func-

tions. Once the BZ/BZ option is selected, the

buzzer output signals are controlled by the PB0

data register only. The I/O functions of

PB0/PB1 are shown below.

PB0 I/O

OOOOO

PB1 I/O

OOOOO

PB0 Mode

CBBBB

PB1 Mode

CCCBB

PB0 Data

0101

PB1 Data

PB0 Pad Status

0B0B

PB1 Pad Status

Note: ²I² input, ²O² output, ²D, D0,D1² data,

²B² buzzer option, BZ or BZ, ²x² don't care

²C² CMOS output

HT48C50- Scheda tecnica(PDF) 21 Page - Holtek Semiconductor Inc

HT48C50- Scheda tecnica(HTML) 21 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45

Scheda tecnica Scarica

Link URL