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HT49C50 Scheda tecnica(PDF) 21 Page - Holtek Semiconductor Inc |
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HT49C50 Scheda tecnica(HTML) 21 Page - Holtek Semiconductor Inc |
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21 / 52 page ![]() HT49C50 21 August 18, 1999 The states of the registers are summarized below: Register Reset (Power On) WDT Time-out (Normal Operation) RES Reset (Normal Operation) RES Reset (HALT) WDT Time-out (HALT)* TMR0 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TMR0C 0000 1--- 0000 1--- 0000 1--- 0000 1--- uuuu u--- TMR1 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TMR1C 0000 1--- 0000 1--- 0000 1--- 0000 1--- uuuu u--- Program Counter 000H 000H 000H 000H 000H MP0 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu MP1 xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu ACC xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLP xxxx xxxx uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu TBLH -xxx xxxx -uuu uuuu -uuu uuuu -uuu uuuu -uuu uuuu STATUS --00 xxxx --1u uuuu --uu uuuu --01 uuuu --11 uuuu INTC0 -000 0000 -000 0000 -000 0000 -000 0000 -uuu uuuu INTC1 -000 -000 -000 -000 -000 -000 -000 -000 -uuu -uuu RTCC --00 0111 --00 0111 --00 0111 --00 0111 --uu uuuu PA 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PB 1111 1111 1111 1111 1111 1111 1111 1111 uuuu uuuu PC ---- 1111 ---- 1111 ---- 1111 ---- 1111 ---- uuuu Notes: ²*² refers to warm reset ²u² means unchanged ²x² means unknown |
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