HTG12N0 datasheet(16/30 Pages) HOLTEK

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Instruction Set Summary

Mnemonic

Description

Byte

Cycle

Arithmetic

ADD A,[R1R0]

ADC A,[R1R0]

SUB A,[R1R0]

SBC A,[R1R0]

ADD A,XH

SUB A,XH

DAA

Add data memory to ACC

Add data memory with carry to ACC

Subtract data memory from ACC

Subtract data memory from ACC with borrow

Add immediate data to ACC

Subtract immediate data from ACC

Decimal adjust ACC for addition

√

Logic Operation

AND A,[R1R0]

OR A,[R1R0]

XOR A,[R1R0]

AND [R1R0],A

OR [R1R0],A

XOR [R1R0],A

AND A,XH

OR A,XH

XOR A,XH

AND data memory to ACC

OR data memory to ACC

Exclusive-OR data memory to ACC

AND ACC to data memory

OR ACC to data memory

Exclusive-OR ACC to data memory

AND immediate data to ACC

OR immediate data to ACC

Exclusive-OR immediate data to ACC

—

Increment and

Decrement

INC A

INC Rn

INC [R1R0]

INC [R3R2]

DEC A

DEC Rn

DEC [R1R0]

DEC [R3R2]

Increment ACC

Increment register, n=0~4

Increment data memory

Decrement ACC

Decrement register, n=0~4

Decrement data memory

—

Data Move

MOV A,Rn

MOV Rn,A

MOV A,[R1R0]

MOV A,[R3R2]

MOV [R1R0],A

MOV [R3R2],A

MOV A,XH

MOV R1R0,XXH

MOV R3R2,XXH

MOV R4,XH

Move register to ACC, n=0~4

Move ACC to register, n=0~4

Move data memory to ACC

Move ACC to data memory

Move immediate data to ACC

Move immediate data to R1 and R0

Move immediate data to R3 and R2

Move immediate data to R4

—

HTG12N0

18th Mar ’99

HTG12N0 Scheda tecnica(PDF) 16 Page - Holtek Semiconductor Inc

HTG12N0 Scheda tecnica(HTML) 16 Page - Holtek Semiconductor Inc

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