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82375EB Scheda tecnica(PDF) 97 Page - Intel Corporation |
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82375EB Scheda tecnica(HTML) 97 Page - Intel Corporation |
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97 / 131 page  82375EBSB 60 DATA BUFFERING The PCEB contains data buffers (Figure 24) to isolate the PCI Bus from the EISA Bus and to provide concur- rent EISA and PCI Bus operations and APIC operations The Line Buffers are used for EISA-to-PCI memory reads and writes A control bit in the EPMRA Registers permis the Line Buffers to be enabled (accesses are buffered) or disabled (accesses are non-buffered) Non-buffered accesses use the bypass path Note that PCI and EISA IO readwrite cycles and PCI configuration cycles are always non-buffered and use the bypass path When data is temporarily stored in the buffers between the EISA Bus and PCI Bus there are potential data coherency issues The PCEB guarantees data coherency by intervening when data coherency could be lost and either flushing or invalidating the buffered data as appropriate 290477 – 67 Figure 24 PCEB Data Buffers 97 |
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