AN4253 datasheet(21/44 Pages) STMICROELECTRONICS

Il numero della parte	AN4253

Spiegazioni elettronici	SPC564Lx device startup flow

PDF	44 Pages

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Produttore elettronici	STMICROELECTRONICS [STMicroelectronics]

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AN4253

HW resource initialization

Figure 9. Flow of the "Initialization of backbone hardware resources" phase

This block is responsible for the initialization of the hardware resources that have an impact

on startup time, like optimizing the flash access time, initialization of the core cache, setting

up clock subsystem etc.

Anything that does not have an impact on the startup should be left on the application

startup executed later on.

7.1

AIPS protection

AIPS protection is a feature implemented in a peripheral bridge module to control access

rights of bus masters accessing peripheral modules.

Figure 10. AIPS block scheme

7.1.1

Default reset configuration

•

Core_0/1

Both are privileged and trusted to access peripherals.

•

DMA,Flexray

Not privileged, forced to an user mode. They cannot access peripheral

memory space without modification of AIPS configuration.

AN4253 Scheda tecnica(PDF) 21 Page - STMicroelectronics