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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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AN4253 Scheda tecnica(PDF) 24 Page - STMicroelectronics |
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AN4253 Scheda tecnica(HTML) 24 Page - STMicroelectronics |
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24 / 44 page  HW resource initialization AN4253 24/44 DocID024255 Rev 2 Figure 12. Clock subsystem 7.6.1 Default reset configuration As seen from the default configuration above, the system clock used for code execution is the internal IRC oscillator running on 16 MHz. It is advised to change the clock setting before RAM initialization and before the application startup to make the process faster. • System clock IRC_16 MHz • Oscillator Disabled • FMPLLs Disabled • Clock output Disabled • Peripheral clock Enabled, PCLK = IRC_16 MHz • Motor clock Enabled, MCLK = IRC_16 MHz • Flexray clock Enabled, FCLK = system FMPLL • CAN clock Enabled, CCLK = system FMPLL • FMPLL0 input IRC_16 MHz • FMPLL1 input IRC_16 MHz |
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