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UPD17708 Scheda tecnica(PDF) 223 Page - NEC |
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UPD17708 Scheda tecnica(HTML) 223 Page - NEC |
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223 / 356 page ![]() 223 µPD17704, 17705, 17707, 17708, 17709 Figure 16-5. Configuration of Serial I/O0 Status Detection Register Name Flag symbol b3 S I O 0 S F 8 b2 S I O 0 S F 9 b1 S B S T T b0 S B B S Y Address 0DH Read/Write R Serial I/O0 status detection Power-ON reset WDT&SP reset CE reset Clock stop 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 Detects stop condition Detects start condition Detects start /stop condition of I2C bus mode 0 1 0 1 0 1 I2C bus mode Serial I/O mode Retains “0” Detects rising of clock when value of clock counter is “9” Detects start condition Detects start condition and clock counter in I2C bus mode I2C bus mode Serial I/O mode Retains “0” Detects rising of clock when value of clock counter is next to “9” Value of clock counter is “9” Detects clock counter I2C bus mode Serial I/O mode Retains “0” Detects rising of clock when value of clock counter is next to “8” Value of clock counter is “8” Detects clock counter I2C bus mode Serial I/O mode |
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