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LM49352 Scheda tecnica(PDF) 35 Page - Texas Instruments

Il numero della parte LM49352
Spiegazioni elettronici  Boomer Mono Class D Audio Codec Subsystem with Ground Referenced Headphone Amplifiers, Earpiece Driver, and Audio DSP
PDF  106 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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LM49352 Scheda tecnica(HTML) 35 Page - Texas Instruments

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9
PLL_P2
1 ± 25 MHz
1 ± 25 MHz
PLL_P1
8
PLL_M
PLL_N_MOD
7
5
9
% N
% P1
% P2
VCO
6'M
140 to
210 MHz
0.7 < 5 MHz
% M
N = 10, 11, 12
_> 250
Phase Comparator
and Charge Pump
M = 1, 1.5, 2
_> 64
0.5 - 50 MHz
PLL_N
I
8
P1 = 1,1.5, 2
_> 256
P2 = 1,1.5, 2
_> 256
LM49352
www.ti.com
SNAS467E – MARCH 2009 – REVISED MARCH 2013
PLL Setup Registers
Figure 58. PLL Loop
The LM49352 contains a PLL for flexible operation of its dual audio ports. The PLL has a P1 and P2 output
divider thereby allowing the PLL to generate two distinct clock outputs. The equations for the PLL's generated
output clocks are as follows:
fOUT1 = (fIN . N / M . P1)
fOUT2 = (fIN . N / M . P2)
where:
N = PLL_N + PLL_N_MOD
M = (PLL_M + 1) / 2
P1 = (PLL_P1 + 1) / 2
P2 = (PLL_P2 + 1) / 2
The VCO frequency and comparison frequencies are as follows:
fVCO = fOUT.P
fCOMP = fIN/M
Keep fVCO between 140MHz to 240MHz and keep fCOMP between 700KHz to 5MHz.
Table 8. PLL Settings for Common System Clock Frequencies
fIN (MHz)
M
N
N_MOD
P
fOUT (Hz)
Error (Hz)
12
2.5
32
0
12.5
12288000
0
13
15.5
175
26
12
12287970
–30
14.4
12.5
128
0
12
12288000
0
16.2
13.5
128
0
12.5
12288000
0
16.8
3.5
32
0
12.5
12288000
0
19.2
12.5
96
0
12
12288000
0
19.68
20.5
160
0
12.5
12288000
0
19.8
16.5
128
0
12.5
12288000
0
26
32.5
192
0
12.5
12288000
0
27
22.5
128
0
12.5
12288000
0
12
12.5
147
0
12.5
11289600
0
12.288
10
147
0
16
11289600
0
13
9
144
19
18.5
11289603
+3
14.4
12.5
147
0
15
11289600
0
16.2
22.5
196
0
12.5
11289600
0
16.8
12.5
126
0
15
11289600
0
19.2
20
147
0
12.5
11289600
0
Copyright © 2009–2013, Texas Instruments Incorporated
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