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TC7107 Scheda tecnica(PDF) 13 Page - Microchip Technology |
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TC7107 Scheda tecnica(HTML) 13 Page - Microchip Technology |
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13 / 26 page ![]() © 2002 Microchip Technology Inc. DS21455B-page 13 TC7106/A/TC7107/A 7.0 COMPONENT VALUE SELECTION 7.1 Auto-Zero Capacitor (CAZ) The CAZ capacitor size has some influence on system noise. A 0.47 µF capacitor is recommended for 200mV full scale applications where 1LSB is 100 µV. A 0.047µF capacitor is adequate for 2.0V full scale applications. A mylar type dielectric capacitor is adequate. 7.2 Reference Voltage Capacitor (CREF) The reference voltage used to ramp the integrator out- put voltage back to zero during the reference integrate cycleisstoredonCREF.A 0.1µF capacitor is acceptable when VIN- is tied to analog common. If a large Common mode voltage exists (VREF- – analog common) and the application requires 200mV full scale, increase CREF to 1.0 µF. Rollover error will be held to less than 1/2 count. A mylar dielectric capacitor is adequate. 7.3 Integrating Capacitor (CINT) CINT should be selected to maximize the integrator out- put voltage swing without causing output saturation. Due to the TC7106A/7107A superior temperature coef- ficient specification, analog common will normally sup- ply the differential voltage reference. For this case, a ±2V full scale integrator output swing is satisfactory. For 3 readings/second (FOSC =48kHz), a0.22µF value is suggested. If a different oscillator frequency is used, CINT must be changed in inverse proportion to maintain the nominal ±2V integrator swing. An exact expression for CINT is: EQUATION 7-1: CINT must have low dielectric absorption to minimize rollover error. A polypropylene capacitor is recom- mended. 7.4 Integrating Resistor (RINT) The input buffer amplifier and integrator are designed with class A output stages. The output stage idling cur- rent is 100 µA. The integrator and buffer can supply 20 µA drive currents with negligible linearity errors. RINT is chosen to remain in the output stage linear drive region, but not so large that printed circuit board leak- age currents induce errors. For a 200mV full scale, RINT is 47kΩ. 2.0V full scale requires 470kΩ. Note: FOSC = 48kHz (3 readings per sec). 7.5 Oscillator Components ROSC (Pin 40 to Pin 39) should be 100kΩ.COSC is selected using the equation: EQUATION 7-2: For FOSC of 48kHz, COSC is 100pF nominally. Note that FOSC is divided by four to generate the TC7106A internal control clock. The backplane drive signal is derived by dividing FOSC by 800. To achieve maximum rejection of 60Hz noise pickup, the signal integrate period should be a multiple of 60Hz. Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suit- able. Note that 40kHz (2.5 readings/second) will reject both 50Hz and 60Hz. 7.6 Reference Voltage Selection A full scale reading (2000 counts) requires the input signal be twice the reference voltage. *VFS =2VREF. In some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. Assume, for example, a pres- sure transducer output is 400mV for 2000 lb/in2. Rather than dividing the input voltage by two, the refer- ence voltage should be set to 200mV. This permits the transducer input to be used directly. CINT = (4000) VINT 1 FOSC VFS RINT Where: FOSC = Clock Frequency at Pin 38 VFS = Full Scale Input Voltage RINT = Integrating Resistor VINT = Desired Full Scale Integrator Output Swing Component Value Nominal Full Scale Voltage 200.0mV 2.000V CAZ 0.47 µF 0.047 µF RINT 47k Ω 470k Ω CINT 0.22 µF0.22µF Required Full Scale Voltage* VREF 200.0mV 100.0mV 2.000V 1.000V FOSC = 0.45 RC |
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