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AS0260CSSC28SUD20 Scheda tecnica(PDF) 68 Page - ON Semiconductor

Il numero della parte AS0260CSSC28SUD20
Spiegazioni elettronici  Digital Image Sensor
PDF  83 Pages
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Produttore elettronici  ONSEMI [ON Semiconductor]
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AS0260CSSC28SUD20 Scheda tecnica(HTML) 68 Page - ON Semiconductor

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AS0260 DS Rev. G Pub. 5/15 EN
68
©Semiconductor Components Industries, LLC, 2015.
AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi-
tal Image Sensor
Sequential Read, Start from Random Location
This sequence (Figure 38) starts in the same way as the single read from random location
(Figure 36). Instead of generating a no-acknowledge bit after the first byte of data has
been transferred, the master generates an acknowledge bit, and continues to perform
byte reads until L bytes have been read.
Figure 38:
Sequential Read, Start from Random Location
Sequential Read, Start from Current Location
This sequence (Figure 39) starts in the same way as the single read from current location
(Figure 37). Instead of generating a no-acknowledge bit after the first byte of data has
been transferred, the master generates an acknowledge bit, and continues to perform
byte reads until L bytes have been read.
Figure 39:
Sequential Read, Start from Current Location
Single Write to Random Location
This sequence (Figure 40) begins with the master generating a start condition. The slave
address/data direction byte signals a write and is followed by the high then low bytes of
the register address that is to be written. The master follows this with the byte of write
data. The write is terminated by the master generating a stop condition.
Slave Address
0
S
Sr
A Reg Address[15:8]
A
Read Data
Read Data
A
Reg Address[7:0]
A
Read Data
Slave Address
Previous Reg Address, N
Reg Address, M
M+1
M+2
M+1
M+3
A
A
1
A
A
Read Data
Read Data
M+L-2
M+L-1
M+L
A S
A
Read Data
Read Data
Previous Reg Address, N
N+1
N+2
N+L-1
N+L
A
Read Data
Slave Address
A
A
1
Read Data
A S
S



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