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AS0260CSSC28SUD20 Scheda tecnica(PDF) 13 Page - ON Semiconductor |
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AS0260CSSC28SUD20 Scheda tecnica(HTML) 13 Page - ON Semiconductor |
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13 / 83 page ![]() AS0260 DS Rev. G Pub. 5/15 EN 13 ©Semiconductor Components Industries, LLC, 2015. AS0260: 1/6-Inch 1080P High-Definition (HD) System-On-A-Chip (SOC) Digi- tal Image Sensor Soft Reset The host processor can reset the AS0260 using the two-wire serial interface by writing to SYSCTL 0x001A. SYSCTL 0x001A[0] is used to reset the AS0260 which is similar to external RESET_BAR signal. 1. Set SYSCTL 0x001A[0] to 0x1 to initiate internal reset cycle. 2. Reset SYSCTL 0x001A[0] to 0x0 for normal operation. 3. Delay up to 35 ms, depending on EXTCLK frequency. Figure 6: Soft Reset Operation Notes: 1. This delay is dependent on EXTCLK frequency. 2. Assumes that CONFIG/GPIO1 = 1. Shutdown Mode The shutdown mode is entered when the SHUTDOWN pin is asserted. All power to the AS0260 is disabled and no state, register, or patch information is retained. De-assertion of the SHUTDOWN pin will cause a full POR. Table 5: Soft Reset Signal Timing Symbol Parameter Min Typ Max Unit t1 Maximum soft reset time1 –– 35 ms EXTCLK SDATA Mode Write Soft Reset Command Resetting Registers Enter Streaming Mode t1 SCLK |
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