TMP007 datasheet(35/55 Pages) TI

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TMP007

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SBOS685C – APRIL 2014 – REVISED JULY 2015

7.5.14 Memory Access Register (address = 2Ah) [reset = 0000h]

The internal memory can be accessed through the memory access register. When the register is read, it returns

the values in read name. When the register is written to, it must contain the value 6Axxh to enable the contents

of the register specified by Adr4 to Adr0 to be stored in memory.

Figure 51. Memory Access Register: Read

Mem

nwR_2 nwR_1 nwR_0

—

Adr4

Adr3

Adr2

Adr1

Adr0

Crpt

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Figure 52. Memory Access Register: Write

Gener

Mem

Single

Adr4

Adr3

Adr2

Adr1

Adr0

Store

Load

N/A

LEGEND: N/A = reset value not applicable for write operation.

nwR_2 to nwR_0:

Number of Programs. Bits 15 to 13.

A memory location can be programmed a maximum of eight times. These bits contain the number of times this

location has been programmed. After the eighth programming to a given location, subsequent attempts to program

are ignored.

Mem Crpt:

Memory Corrupt. Bit 12 (read only).

This bit is a mirror of bit 8 in the status register.

Adr4 to Adr0:

Memory Address. Bits 7 to 3.

Used to specify register address to operate on. Address here is the same as the register in register address table..

General Load:

General Load. Bit 2 (write only).

Loads all registers from memory with the last value stored in memory for that register. Adr[4:0] are don’t care in this

case.

Mem Store:

Memory Store. Bit 1 (write only).

Write 1 to this bit along with the register address to store that registers contents to memory.

Single Load:

Single Load. Bit 0.

Performs an load of the memory contents to the register address determined by the Adr[4:0] bits.

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