LMT86LP datasheet(7/26 Pages) TI

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LMT86, LMT86-Q1

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SNIS169C – MARCH 2013 – REVISED OCTOBER 2015

7.6

Accuracy Characteristics

These limits do not include DC load regulation. These stated accuracy limits are with reference to the values in Table 1.

PARAMETER

CONDITIONS

MIN(1)

TYP(2) MAX (1)

UNIT

40°C to 150°C; VDD = 2.2 V to 5.5 V

-2.7

±0.4

2.7

°C

0°C to 40°C; VDD = 2.4 V to 5.5 V

-2.7

±0.7

2.7

°C

Temperature accuracy(3)

0°C to 70°C; VDD = 3.0 V to 5.5 V

±0.3

°C

–50°C to 0°C; VDD = 3.0 V to 5.5 V

-2.7

±0.7

2.7

°C

–50°C to 0°C; VDD = 3.6 V to 5.5 V

±0.25

°C

(1)

Limits are specified to TI's AOQL (Average Outgoing Quality Level).

(2)

Typicals are at TJ = TA = 25°C and represent most likely parametric norm.

(3)

Accuracy is defined as the error between the measured and reference output voltages, tabulated in the Transfer Table at the specified

conditions of supply gain setting, voltage, and temperature (expressed in °C). Accuracy limits include line regulation within the specified

conditions. Accuracy limits do not include load regulation; they assume no dc load.

7.7

Electrical Characteristics

Unless otherwise noted, these specifications apply for +VDD = 2.2 V to 5.5 V. MIN and MAX limits apply for TA = TJ = TMIN to

TMAX , unless otherwise noted; typical values apply for TA = TJ = 25°C.

PARAMETER

CONDITIONS

MIN (1)

TYP (2)

MAX (1)

UNIT

Average sensor gain (output

-30°C and 90°C used to calculate average

–10.9

mV/°C

transfer function slope)

sensor gain

Source

≤ 50 μA, (VDD – VOUT) ≥ 200 mV

-1

–0.22

Load regulation(3)

Sink

≤ 50 μA, VOUT ≥ 200 mV

0.26

Line regulation(4)

200

μV/V

TA = 30°C to 150°C, (VDD – VOUT) ≥ 100 mV

5.4

8.1

μA

Supply current

TA = -50°C to 150°C, (VDD – VOUT) ≥ 100 mV

5.4

μA

Output load capacitance

1100

Power-on time(5)

CL= 0 pF to 1100 pF

0.7

1.9

Output drive

TA = TJ = 25°C

-50

µA

(1)

Limits are specific to TI's AOQL (Average Outgoing Quality Level).

(2)

Typicals are at TJ = TA = 25°C and represent most likely parametric norm.

(3)

Source currents are flowing out of the LMT86 and LMT86-Q1. Sink currents are flowing into the LMT86 and LMT86-Q1.

(4)

Line regulation (DC) is calculated by subtracting the output voltage at the highest supply voltage from the output voltage at the lowest

supply voltage. The typical DC line regulation specification does not include the output voltage shift discussed in Output Voltage Shift.

(5)

Specified by design and characterization.

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