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AS5147P Scheda tecnica(PDF) 12 Page - ams AG |
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AS5147P Scheda tecnica(HTML) 12 Page - ams AG |
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12 / 40 page ![]() Page 12 ams Datasheet Document Feedback [v1-01] 2015-May-12 AS5147P − Detailed Description SPI Interface (Slave) The SPI interface is used by a host microcontroller (master) to read or write the volatile memory as well as to program the non-volatile OTP registers. The AS5147P SPI only supports slave operation mode. It communicates at clock rates up to 10 MHz. The AS5147P SPI uses mode=1 (CPOL=0, CPHA=1) to exchange data. As shown in Figure 12, a data transfer starts with the falling edge of CSn (SCL is low). The AS5147P samples MOSI data on the falling edge of SCL. SPI commands are executed at the end of the frame (rising edge of CSn). The bit order is MSB first. Data is protected by parity. SPI Timing The AS5147P SPI timing is shown in Figure 12. Figure 12: SPI Timing Diagram CSn (Input) CLK (Input) MOSI (Input) MISO (Output) tclk tL tMOSI tMISO tOZ tOZ tH tCSn tclkL tclkH Data[15] Data[15] Data[14] Data[14] Data[0] Data[0] |
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