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AS5147P Scheda tecnica(PDF) 15 Page - ams AG |
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AS5147P Scheda tecnica(HTML) 15 Page - ams AG |
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15 / 40 page ![]() ams Datasheet Page 15 [v1-01] 2015-May-12 Document Feedback AS5147P − Detailed Description Figure 17: SPI Write Data Frame The parity bit PARD must be calculated from the 16-bit data. In an SPI write transaction, the write command frame (e.g. Write ADD[n]) is followed by a data frame (e.g. DATA [x]). In addition to writing an address in the AS5147P, a write command frame causes the old contents of the addressed register (e.g. DATA [y]) to be sent on MISO in the following frame. This is followed by the new contents of the addressed register (DATA [x]) as shown in Figure 19. Figure 18: SPI Write Transaction Bit Name Description 15 PARD Parity bit (even) 14 0 Always low 13:0 DATA Data Write ADD[n] CSn MOSI MISO DATA (x) DATA (y) Write (ADDm) DATA (p) Next command DATA (y) DATA (y) DATA (x) Command Command Command Data to write into ADD[n] Data content of ADD[n] New Data content of ADD[n] Data content of ADD[m] New Data content of ADD[m] Data to write into ADD[n] |
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