USB5537B datasheet(57/79 Pages) MICROCHIP

57 / 79 page

 2012 - 2015 Microchip Technology Inc.

DS00001682C-page 57

USB5537B

5.6.45

USB PORT 2 VARISENSE REGISTER

5.6.46

USB3 PORT 2 LINK STATE

5.6.47

USB PORT 3 BOOST REGISTER

TABLE 5-61:

USB PORT 2 VARISENSE REGISTER

PHY_P2_SENSE

(0X68CC)

USB Port 2 Varisense Register

Bit

Name

R/W

Description

7:3

Reserved

2:0

HS_SQ_TUNE[2:0]

R/W

Squelch Tune

3’b000: Nominal 100mV Trip Point

3’b001: Decrease by 12.5mV

3’b010: Decrease by 25mV

3’b011: Decrease by 37.5mV

3’b100: Decrease by 50mV

3’b101: Decrease by 62.5mV

3’b110: Increase by 25mV

3’b111: Increase by 12.5mV

TABLE 5-62:

USB3 PORT 2 LINK STATE

SS_P2_STATE

(0X69C0)

USB3 Port 2 Link State

Bit

Name

R/W

Description

7:4

LINK_STATE

Refer to Table 5-74, "USB 3.0 Link States" for more details.

Reserved

2:0

LINK_SUB_STATE

Refer to Table 5-74, "USB 3.0 Link States" for more details.

TABLE 5-63:

USB PORT 3 BOOST REGISTER

HS_P3_BOOST

(0X6CCA)

USB Port 3 Boost Register

Bit

Name

R/W

Description

7:3

Reserved

R/W

Reserved

2:0

HS_BOOST

R/W

HS Output Current.

3’b000: Nominal

3’b001: Decrease by 5%

3’b010: Increase by 10%

3’b011: Increase by 5%

3’b100: Increase by 20%

3’b101: Increase by 15%

3’b110: Increase by 30%

3’b111: Increase by 25%

USB5537B Scheda tecnica(PDF) 57 Page - Microchip Technology

USB5537B Scheda tecnica(HTML) 57 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79

Scheda tecnica Scarica

Link URL