LSM6DSM datasheet(37/113 Pages) STMICROELECTRONICS

37 / 113 page

DocID028165 Rev 2

37/113

LSM6DSM

Digital interfaces

113

Digital interfaces

6.1

I2C/SPI interface

The registers embedded inside the LSM6DSM may be accessed through both the I2C and

SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire

interface mode.

The serial interfaces are mapped onto the same pins. To select/exploit the I2C interface, the

CS line must be tied high (i.e connected to Vdd_IO).

6.2

Master I2C

If the LSM6DSM is configured in Mode2, a master I2C line is available. The master serial

interface is mapped in the following dedicated pins.

Table 9. Serial interface pin description

Pin name

Pin description

SPI enable

I2C/SPI mode selection (1: SPI idle mode / I2C communication enabled;

0: SPI communication mode / I2C disabled)

SCL/SPC

I2C Serial Clock (SCL)

SPI Serial Port Clock (SPC)

SDA/SDI/SDO

I2C Serial Data (SDA)

SPI Serial Data Input (SDI)

3-wire Interface Serial Data Output (SDO)

SDO/SA0

SPI Serial Data Output (SDO)

I2C less significant bit of the device address

Table 10. Master I2C pin details

Pin name

Pin description

MSCL

I2C serial clock master

MSDA

I2C serial data master

MDRDY

I2C master external synchronization signal

LSM6DSM Scheda tecnica(PDF) 37 Page - STMicroelectronics

LSM6DSM Scheda tecnica(HTML) 37 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL