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DSC2011

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MK-Q-B-P-D-12042602-2

DSC2011

Low-Jitter Configurable Dual CMOS Oscillator

Absolute Maximum Ratings

Item

Min

Max

Unit

Condition

Supply Voltage

-0.3

+4.0

V

Input Voltage

-0.3

V

Junction Temp

-

+150

°C

Storage Temp

-55

+150

°C

Soldering Temp

-

+260

°C

40sec max.

ESD

HBM

MM

CDM

-

4000

400

1500

V

Note: 1000+ years of data retention on internal memory

Ordering Code

Notes:

1.

2.

Output is enabled if Enable pad is floated or not connected.

3.

4.

Output Waveform and Test Circuit figures below define the parameters.

5.

Period Jitter includes crosstalk from adjacent output.

Parameter

Condition

Min.

Typ.

Max.

Unit

2.25

3.6

V

Supply Current

EN pin low – outputs are disabled

21

23

mA

EN pin high – outputs are enabled

32

mA

Frequency Stability

Δf

Includes frequency variations due

to initial tolerance, temp. and

power supply voltage

±10

±25

±50

ppm

Aging

Δf

1 year @25°C

±5

ppm

T=25°C

5

ms

Input Logic Levels

Input logic high

Input logic low

-

-

V

5

ns

Output Enable Time

20

ns

Pull-up exists on all digital IO

40

kΩ

CMOS Outputs

Output Logic Levels

Output logic high

Output logic low

I=±6mA

-

-

V

Rise Time

Fall Time

20% to 80%

1.1

1.4

2

2

ns

Frequency

Commercial/Industrial temp range

Automotive temp range

2.3

170

100

MHz

Output Duty Cycle

SYM

45

55

%

3

Integrated Phase Noise

200kHz to 20MHz @ 125MHz

100kHz to 20MHz @ 125MHz

12kHz to 20MHz @ 125MHz

0.3

0.38

1.7

2

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Freq (MHz)

See Freq. table

-

Packing

T: Tape & Reel

: Tube

F I 2

Package

F: 3.2x2.5mm

Temp Range

E: -20 to 70

I: -40 to 85

L: -40 to 105

M: -55 to 125

Stability

1: ±50ppm

2: ±25ppm

5: ±10ppm

T