LT1737IGN datasheet(12/28 Pages) LINER

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LT1737

1737f

APPLICATIO S I FOR ATIO

TRANSFORMER DESIGN CONSIDERATIONS

Transformer specification and design is perhaps the most

critical part of applying the LT1737 successfully. In addi-

tion to the usual list of caveats dealing with high frequency

isolated power supply transformer design, the following

information should prove useful.

Turns Ratios

Note that due to the use of the external feedback resistor

divider ratio to set output voltage, the user has relative

freedom in selecting transformer turns ratio to suit a given

application. In other words, “screwball” turns ratios like

“1.736:1.0” can scrupulously be avoided! In contrast,

simpler ratios of small integers, e.g., 1:1, 2:1, 3:2, etc. can

be employed which yield more freedom in setting total

turns and mutual inductance. Turns ratio can then be

chosen on the basis of desired duty cycle. However,

remember that the input supply voltage plus the second-

ary-to-primary referred version of the flyback pulse (in-

cluding leakage spike) must not exceed the allowed external

MOSFET breakdown rating.

Leakage Inductance

Transformer leakage inductance (on either the primary or

secondary) causes a spike after output switch turnoff. This

is increasingly prominent at higher load currents, where

more stored energy must be dissipated. In many cases a

“snubber” circuit will be required to avoid overvoltage

breakdown at the output switch node. Application Note

AN19 is a good reference on snubber design.

In situations where the flyback pulse extends beyond the

enable delay time, the output voltage regulation will be

affected to some degree. It is important to realize that the

feedback system has a deliberately limited input range,

roughly

±50mV referred to the FB node, and this works to

the user’s advantage in rejecting large, i.e., higher voltage,

leakage spikes. In other words, once a leakage spike is

several volts in amplitude, a further increase in amplitude

has little effect on the feedback system. So the user is

generally advised to arrange the snubber circuit to clamp

at as high a voltage as comfortably possible, observing

MOSFET breakdown, such that leakage spike duration is

as short as possible.

As a rough guide, total leakage inductances of several

percent (of mutual inductance) or less may require a

snubber, but exhibit little to no regulation error due to

leakage spike behavior. Inductances from several percent

up to perhaps ten percent cause increasing regulation

error.

Severe leakage inductances in the double digit percentage

range should be avoided if at all possible as there is a

potential for abrupt loss of control at high load current.

This curious condition potentially occurs when the leak-

age spike becomes such a large portion of the flyback

waveform that the processing circuitry is fooled into

thinking that the leakage spike itself is the real flyback

signal! It then reverts to a potentially stable state whereby

the top of the leakage spike is the control point, and the

trailing edge of the leakage spike triggers the collapse

detect circuitry. This will typically reduce the output volt-

age abruptly to a fraction, perhaps between one-third to

two-thirds of its correct value. If load current is reduced

sufficiently, the system will snap back to normal opera-

tion. When using transformers with considerable leakage

inductance, it is important to exercise this worst-case

check for potential bistability:

1. Operate the prototype supply at maximum expected

load current.

2. Temporarily short circuit the output.

3. Observe that normal operation is restored.

If the output voltage is found to hang up at an abnormally

low value, the system has a problem. This will usually be

evident by simultaneously monitoring the VSW waveform

on an oscilloscope to observe leakage spike behavior

firsthand. A final note—the susceptibility of the system to

bistable behavior is somewhat a function of the load I/V

characteristics. A load with resistive, i.e., I = V/R behavior

is the most susceptible to bistability. Loads which exhibit

“CMOSsy”, i.e., I = V2/R behavior are less susceptible.

Secondary Leakage Inductance

In addition to the previously described effects of leakage

inductance in general, leakage inductance on the second-

ary in particular exhibits an additional phenomenon. It

forms an inductive divider on the transformer secondary,

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