Features

The PCI Express electrical test software

offers several features to simplify the

validation of PCI Express designs:

– PCIe 3.0 measurements for

uncorrelated TJ, DJ, and PWJ, pseudo

package loss, and preset de-emphasis

and preshoot.

– Automated 1.6 M Unit Interval (or

greater) testing for highest accuracy

when embedding PCIe reference

channel and package model losses

– Results consistent with PCI-SIG

SigTest software utility

– Support for de-embedding of test

– Test setup wizard for ease-of-use

– Wide range of electrical transmitter

and reference clock tests

– PCI-SIG SigTest clock recovery

algorithm

– Optional integrated receiver test

calibration suite for automated

calibration (BASE spec) of your

– Automated scope measurement

setup

– Test results report generation

– Pass/fail margin analysis

– Reference clock phase jitter analysis

– Two-port (explicit clock and data)

supported for motherboard signal

quality testing

– Support for both full-swing and

low-power, half-swing devices.

With the PCI Express electrical test

software, you can use the same

oscilloscope you use for everyday

debugging to perform automated testing

and margin analysis based on the PCI-

SIG-specified tests.

PCI Express compliance testing

To pass signal quality testing at a PCI-SIG-sponsored compliance workshop, your

product must successfully pass “Gold Suite” testing, based on the PCI-SIG SigTest

application. The SigTest application tests your device against the minimum signal-quality

performance requirements for PCI. If you are developing receivers and transmitters for

add-in boards and system motherboards, the PCI Express electrical test software helps

you execute the SigTest tests and additional oscilloscope already completed tests. See

the list of tests in Table 3 on page 16 (for 1.1 test coverage).

While SigTest tests provide a good overview of PCI Express electrical signal quality,

they address only a small subset of the electrical compliance measurements specified

in the PCI-SIG specification. The SigTest application also provides minimal reporting

capability with pass/fail indication and measurement values, and has limited debugging

capabilities to decipher eye mask violations or excessive jitter.

For PCI Express 3.0 measurements, the software automatically calculates uncorrelated

total jitter, uncorrelated deterministic jitter, uncorrelated PWJ necessary for validating

new PCIe 3.0 compliant chipsets. For versions of devices compliant with PCI Express 2.0

or earlier, random jitter is also reported for completeness and a voltage margin “eye”

diagram is included in the final HTML report. DJ and TJ values are specified in the PCIe

2.0 specification and are required for compliance verification.

1. Requires the purchase of the optional Keysight

InfiniiSim Waveform Transformation Toolset

for Infiniium Oscilloscopes.

2. Requires the purchase of N5393D-4FP

software license. Receiver test hardware and

fixtures not included and must be purchased

separately.

Figure 1. PCI Express 2.0 supports data rates up to 5.0 GT/s as shown above (–3.5 dB

de-emphasis).