TC1793 datasheet(9/189 Pages) INFINEON

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TC1793

Summary of Features

Data Sheet

V 1.2, 2014-05

– One External Bus Interface (EBU) supporting different memories: asynchronous

memories e.g. SRAM, peripheral devices; synchronous devices e.g. burst NOR

flash, PSRAM; and DDR NOR flash e.g. LPDDR-NVM (Jedec 42.2), ONFI 2.0

(limited frequency at 1.8 V I/O supply)

– One MultiCAN Module with 4 CAN nodes and 128 free assignable message

objects for high efficiency data handling via FIFO buffering and gateway data

transfer (one CAN node supports TTCAN functionality)

– One FlexRayTM module with 2 channels (E-Ray).

– Two General Purpose Timer Array Modules (GPTA) with additional Local Timer

Cell Array (LTCA2) providing a powerful set of digital signal filtering and timer

functionality to realize autonomous and complex Input/Output management

– Two Capture / Compare 6 modules

– Two General Purpose 12 Timer Units (GPT120 and GPT121)

•

44 analog input lines for ADC

– 4 independent kernels (ADC0, ADC1, and ADC2)

– Analog supply voltage range from 3.3 V to 5 V (single supply)

•

4 different FADC input channels

– channels with impedance control and overlaid with ADC1 inputs

– Extreme fast conversion, 21 cycles of fFADC clock

– 10-bit A/D conversion (higher resolution can be achieved by averaging of

consecutive conversions in digital data reduction filter)

•

8 digital input lines for SENT

– communication according to the SENT specification J2716 FEB2008

•

221 digital general purpose I/O lines (GPIO)

•

Digital I/O ports with 3.3 V capability

•

On-chip debug support for OCDS Level 1 (CPU, PCP, DMA, On Chip Buses)

•

Dedicated Emulation Device chip available (TC1793ED)

– multi-core debugging, real time tracing, and calibration

– four/five wire JTAG (IEEE 1149.1) or two wire DAP (Device Access Port) interface

•

Power Management System

•

Clock Generation Unit with PLL and PLL_ERAY

•

Flexible CRC Engine (FCE)

– IEEE 802.3 CRC32 ethernet polynomial: 0x82608EDB (CRC kernel 0)

– CRC32C Castagnoli: 0xD419CC15 (CRC kernel 1)

The

SAK-TC1793F-512F200EB

/ SAK-TC1793F-512F200EF

has

the

following

features:

•

High-performance 32-bit super-scalar TriCore V1.6 CPU with 6-stage pipeline

– Superior real-time performance

– Strong bit handling

– Fully integrated DSP capabilities

– Multiply-accumulate unit able to sustain 2 MAC operations per cycle

– Fully pipelined Floating point unit (FPU)

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