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CS89712 Scheda tecnica(PDF) 145 Page - Cirrus Logic |
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CS89712 Scheda tecnica(HTML) 145 Page - Cirrus Logic |
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145 / 170 page ![]() CS89712 DS502PP2 145 5.2.1 Output Bi-Directional Pins Note: Output pins above are bi-directional to enable monitored output to provide accurate control of timing or duration RUN The RUN pin is looped back in to skew the address and data bus from each other. Drive [0-1] Drive 0 and 1 are looped back in on power up to determine what polarity the output of the PWM should be when active. DD[3:0] DD[3:0] are looped back in on power up to enable the reading of the ID of some LCD modules. Table 91. Output Bi-Directional Pins |
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