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©2016 Integrated Device Technology, Inc.

October 20, 2016

8P34S2108 Datasheet

1.8V Differential Clock Input Interface

input requirements. Figure 4 to Figure 6 show interface examples for the CLK /nCLK input driven by the most common driver types. The

input interfaces suggested here are examples only. If the driver is from another vendor, use their termination recommendation. Please

consult with the vendor of the driver component to confirm the driver termination requirements.

Figure 4. Differential Input Driven by an LVDS Driver - DC Coupling

Figure 5. Differential Input Driven by an LVDS Driver - AC Coupling

Figure 6. Differential Input Driven by an LVPECL Driver - AC Coupling