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STM32F334x8 Scheda tecnica(PDF) 96 Page - STMicroelectronics |
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STM32F334x8 Scheda tecnica(HTML) 96 Page - STMicroelectronics |
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96 / 115 page ![]() Electrical characteristics STM32F334x4 STM32F334x6 STM32F334x8 96/115 DocID025409 Rev 5 Figure 30. 12-bit buffered /non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. 6.3.21 Comparator characteristics Table 70. Comparator characteristics(1) Symbol Parameter Conditions Min. Typ. Max. Unit VDDA Analog supply voltage - 2 - 3.6 V VIN Comparator input voltage range -0 - VDDA - VBG Scaler input voltage - - VREFINIT -- VSC Scaler offset voltage - - ±5 ±10 mV tS_SC VREFINT scaler startup time from power down First VREFINT scaler activation after device power on -- 1(2) s Next activations - - 0.2 ms tSTART Comparator startup time VDDA ≥ 2.7 V - - 4 µs VDDA < 2.7 V - - 10 tD Propagation delay for 200 mV step with 100 mV overdrive VDDA ≥ 2.7 V - 25 28 ns VDDA < 2.7 V - 28 30 Propagation delay for full range step with 100 mV overdrive VDDA ≥ 2.7 V - 32 35 VDDA < 2.7 V - 35 40 VOFFSET Comparator offset error VDDA ≥ 2.7 V - ±5 ±10 mV VDDA < 2.7 V - - ±25 TVOFFSET Total offset variation Full temperature range - - 3 mV IDD(COMP) COMP current consumption - - 400 600 µA 1. Guaranteed by design, not tested in production. 2. For more details and conditions see Figure 31: Maximum VREFINT scaler startup time from power-down. |
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