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STM32F334x8 Scheda tecnica(PDF) 50 Page - STMicroelectronics |
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STM32F334x8 Scheda tecnica(HTML) 50 Page - STMicroelectronics |
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50 / 115 page ![]() Electrical characteristics STM32F334x4 STM32F334x6 STM32F334x8 50/115 DocID025409 Rev 5 6.3.2 Operating conditions at power-up / power-down The parameters given in Table 20 are derived from tests performed under the ambient temperature condition summarized in Table 19. 6.3.3 Characteristics of the embedded reset and power-control block The parameters given in Table 21 are derived from tests performed under ambient temperature and VDD supply voltage conditions summarized in Table 19. Table 20. Operating conditions at power-up / power-down Symbol Parameter Conditions Min. Max. Unit tVDD VDD rise time rate - 0 ∞ µs/V VDD fall time rate 20 ∞ tVDDA VDDA rise time rate - 0 ∞ VDDA fall time rate 20 ∞ Table 21. Embedded reset and power control block characteristics Symbol Parameter Conditions Min. Typ. Max. Unit VPOR/PDR(1) 1. The PDR detector monitors VDD and also VDDA (if kept enabled in the option bytes). The POR detector monitors only VDD. Power on/power down reset threshold Falling edge 1.8(2) 2. The product behavior is guaranteed by design down to the minimum VPOR/PDR value. 1.88 1.96 V Rising edge 1.84 1.92 2.0 V VPDRhyst(1) PDR hysteresis - - 40 - mV tRSTTEMPO(3) 3. Guaranteed by design, not tested in production. POR reset temporization - 1.5 2.5 4.5 ms |
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