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Figure 5 Timing diagram for digital input/output pads. SDA directions are seen from the sensor. Bold SDA lines are controlled by the

sensor, plain SDA lines are controlled by the micro-controller. Note that SDA valid read time is triggered by falling edge of preceding toggle.

4 Interface Specifications

from 0 to 400 kHz) with clock stretching. For detailed

specification and user manual UM10204, Rev. 4,

February 13, 2012:

http://ics.nxp.com/support/documents/interface/pdf/I2C.bu

s.specification.pdf

The SHTW2 comes in a 4-pin flip chip package – see

Table 7.

Pin Name Comments

1

VDD

Supply voltage

2

SCL

Serial clock,

bidirectional

3

SDA

Serial data,

bidirectional

4

VSS

Ground

Table 7 SHTW2 pin assignment (top view).

Power-supply pins supply voltage (VDD) and ground

(VSS) must be decoupled with a 100 nF capacitor that

shall be placed as close to the sensor as possible – see

Figure 6.

SCL is used to synchronize the communication between

microcontroller and the sensor. The master must keep the

clock frequency within 0 to 400 kHz as specified in Table

6. The SHTW2 may pull down the SCL line when clock

stretching is enabled.

The SDA pin is used to transfer data in and out of the

sensor. For safe communication, the timing specifications

To avoid signal contention, the microcontroller must only

drive SDA and SCL low. External pull-up resistors (e.g.

dimensioning resistor sizes please take bus capacity

requirements into account. It should be noted that pull-up

resistors may be included in I/O circuits of

microcontrollers.

Figure 6 Typical application circuit, including pull-up resistors

For good performance of the SHTW2 in the application, it

is important to know that the solder balls of the SHTW2

offer the best thermal contact to the temperature sensor.

The humidity sensor is centered on the bottom side of the

package and must not be obstructed by underfill or other

material. For more information on design-in, please refer

to the document “SHTxx Design Guide”.

SCL

70%

30%

SDA

70%

30%

DATA IN

SDA

70%

30%

DATA OUT

1

2

3

4

A

BC

XY

SDA

SCL

GND

VDD

MCU (master)

R

P

R

P

SCL OUT

SDA OUT

SDA IN

SCL IN

SHTW2

(slave)