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WM8608 Scheda tecnica(PDF) 26 Page - Wolfson Microelectronics plc |
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WM8608 Scheda tecnica(HTML) 26 Page - Wolfson Microelectronics plc |
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26 / 54 page ![]() WM8608 Product Preview w PP Rev 1.5 March 2004 26 Once the WM8608 has acknowledged a correct address, the controller sends the first byte of control data (B15 to B8, i.e. the WM8608 register address plus the first bit of register data). The WM8608 then acknowledges the first data byte by pulling SDIN low for one clock pulse. The controller then sends the second byte of control data (B7 to B0, i.e. the remaining 8 bits of register data), and the WM8608 acknowledges again by pulling SDIN low. The transfer of data is complete when there is a low to high transition on SDIN while SCLK is high. After receiving a complete address and data sequence the WM8608 returns to the idle state and waits for another start condition. If a start or stop condition is detected out of sequence at any point during data transfer (i.e. SDIN changes while SCLK is high), the device jumps to the idle condition. SDIN SCLK register address and 1st register data bit DEVICE ADDRESS (7 BITS) RD / WR BIT ACK (LOW) CONTROL BYTE 1 (BITS 15 TO 8) CONTROL BYTE 1 (BITS 7 TO 0) remaining 8 bits of register data STOP START ACK (LOW) ACK (LOW) Figure 18 2-Wire Serial Control Interface The WM8608 has two possible device addresses, which can be selected using the CSB pin. CSB STATE DEVICE ADDRESS Low 0011010 High 0011011 Table 20 2-Wire MPU Interface Address Selection INPUT PROCESSOR The WM8608 supports the production of 2.1, 5.1 and 6.1 outputs from stereo, 5.1, 6.1 and 7.1 inputs according to Table 21 and Table 22. INPUT CONFIGURATIONS CONFIG FL IN FR IN SL IN SR IN RL/RC IN RR/RC IN FC IN LFE IN Stereo • • 5.1 • • • • • • 6.1 • • • • • or • • • 7.1 • • • • • • • • Table 21 Input Configuration The RC channel is accepted either in the RL or RR input, or alternatively in both RL and RR inputs. Register control bit RCCFG (Table 23) determines which option is used. OUTPUT CONFIGURATIONS CONFIG FL OUT FR OUT SL OUT SR OUT FC OUT RC OUT SUB OUT Stereo • • 2.1 • • • 5.1 • • • • • • 6.1 • • • • • • • Table 22 Output Configuration By default the Subwoofer channel is directed to the SUB output, which is a lower bandwidth channel operating at half the PWM frequency of the other channels. Optionally, the subwoofer channel can be redirected to the RC channel at the full bandwidth. |
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