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WM9711 Scheda tecnica(PDF) 49 Page - Wolfson Microelectronics plc |
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WM9711 Scheda tecnica(HTML) 49 Page - Wolfson Microelectronics plc |
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49 / 66 page ![]() Production Data WM9711L w PD Rev 4.1 April 2004 49 AC-Link powerdown occurs when PR4 (register 26h, bit 12) is set (see “Power Management” section). PARAMETER SYMBOL MIN TYP MAX UNIT End of Slot 2 to BITCLK and SDATAIN low tS2_PDOWN 1.0 µs COLD RESET (ASYNCHRONOUS, RESETS REGISTER SETTINGS) RESETB BITCLK t RST_LOW t RST2CLK Figure 13 Cold Reset Timing Note: For correct operation SDATAOUT and SYNC must be held LOW for entire RESETB active low period otherwise the device may enter test mode. See AC'97 specification or Wolfson applications note WAN104 for more details. PARAMETER SYMBOL MIN TYP MAX UNIT RESETB active low pulse width tRST_LOW 1.0 µs RESETB inactive to BITCLK startup delay tRST2CLK 162.8 ns WARM RESET (ASYNCHRONOUS, PRESERVES REGISTER SETTINGS) Figure 14 Warm Reset Timing PARAMETER SYMBOL MIN TYP MAX UNIT SYNC active high pulse width tSYNC_HIGH 1.3 µs SYNC inactive to BITCLK startup delay tRST2CLK 162.4 ns |
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