| Motore di ricerca datesheet componenti elettronici |
|
LNBH29 Scheda tecnica(PDF) 7 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
LNBH29 Scheda tecnica(HTML) 7 Page - STMicroelectronics |
|
7 / 31 page ![]() DocID023065 Rev 3 7/31 LNBH29 Application information 2.7 Surge protection and TVS diodes The LNBH29 series is directly connected to the antenna cable in a set-top box. Atmospheric phenomenon can cause high voltage discharges on the antenna cable causing damage to the attached devices. Surge pulses occur due to direct or indirect lightning strikes to an external (outdoor) circuit. This leads to currents or electromagnetic fields causing high voltage or current transients. Transient voltage suppressor (TVS) devices are usually placed, as shown in Figure 3, to protect the STB output circuits where the LNBH29 and other devices are electrically connected to the antenna cable. Figure 3. Surge protection circuit For this purpose the use of LNBTVSxx surge protection diodes specifically designed by ST is recommended. The selection of the LNBTVS diode should be made based on the maximum peak power dissipation that the diode is capable of supporting (see the LNBTVS datasheet for further details). 2.8 VMON: output voltage diagnostic When device output voltage is activated (VOUT pin), its value is internally monitored and, as long as the output voltage level is below the guaranteed limits, the VMON I²C bit is set to “1”. See Table 12 for more details. 2.9 PDO: overcurrent detection on output pull-down stage When an overcurrent occurs on the pull-down output stage due to an external voltage source greater than the LNBH29 nominal VOUT and for a time longer than ISINK_TIME-OUT (10 ms typ.), the PDO I²C bit is set to “1”. This may happen due to an external voltage source presence on the LNB output (VOUT pin). For current threshold and de-glitch time details, see Table 9. 2.10 Power-on I²C interface reset and undervoltage lockout The I²C interface built into the LNBH29 series is automatically reset at power-on. As long as the VCC stays below the undervoltage lockout (UVLO) threshold (4.7 V typ.), the interface does not respond to any I²C command and all DATA register bits are initialized to zeroes, therefore keeping the power blocks disabled. Once the VCC rises above 4.8 V typ. the I²C interface becomes operative and the DATA registers can be configured by the main microprocessor. |
|
Link URL |
| Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | Collegamento alla scheda tecnica | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |