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STM8S003F3 Scheda tecnica(PDF) 75 Page - STMicroelectronics |
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STM8S003F3 Scheda tecnica(HTML) 75 Page - STMicroelectronics |
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75 / 104 page ![]() DocID018576 Rev 9 75/104 STM8S003F3 STM8S003K3 Electrical characteristics 87 9.3.7 Reset pin characteristics Subject to general operating conditions for VDD and TA unless otherwise specified. Figure 34. Typical NRST VIL and VIH vs VDD @ 4 temperatures Table 42. NRST pin characteristics Symbol Parameter Conditions Min Typ 1) Max Unit VIL(NRST) NRST input low level voltage (1) - -0.3 V - 0.3 x VDD V VIH(NRST) NRST input high level voltage (1) - 0.7 x VDD -VDD + 0.3 VOL(NRST) NRST output low level voltage (1) IOL= 2 mA - - 0.5 RPU(NRST) NRST pull-up resistor (2) -30 55 80 k Ω tIFP(NRST) NRST input filtered pulse (3) -- - 75 ns tINFP(NRST) NRST Input not filtered pulse (3) -500 - - ns tOP(NRST) NRST output pulse (1) -20 - - µs 1. Data based on characterization results. 2. The RPU pull-up equivalent resistor is based on a resistive transistor. 3. Data guaranteed by design. |
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