STM8S003F3 datasheet(82/104 Pages) STMICROELECTRONICS

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Electrical characteristics

STM8S003F3 STM8S003K3

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DocID018576 Rev 9

9.3.10

10-bit ADC characteristics

Subject to general operating conditions for VDDA, fMASTER, and TA unless otherwise

specified.

Table 45. ADC characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fADC

ADC clock frequency

VDDA = 3 to 5.5 V

MHz

VDDA = 4.5 to 5.5 V

VAIN

Conversion voltage range(1)

1. During the sample time the input capacitance CAIN (3 pF max) can be charged/discharged by the external

source. The internal resistance of the analog source must allow the capacitance to reach its final voltage

level within tS. After the end of the sample time tS, changes of the analog input voltage have no effect on

the conversion result. Values for the sample clock tS depend on programming.

-VSS

-VDD

CADC

Internal sample and hold

capacitor

tS(1)

Sampling time

fADC = 4 MHz

0.75

µs

fADC = 6 MHz

0.5

tSTAB

Wakeup time from standby

µs

tCONV

Total conversion time (including

sampling time, 10-bit resolution)

fADC = 4 MHz

3.5

µs

fADC = 6 MHz

2.33

µs

-14

1/fADC

Table 46. ADC accuracy with RAIN < 10 kΩ , VDD = 5 V

Symbol

Parameter

Conditions

Typ

Max(1)

Unit

|ET|

Total unadjusted error (2)

fADC = 2 MHz

1.6

3.5

LSB

fADC = 4 MHz

2.2

fADC = 6 MHz

2.4

4.5

|EO|

Offset error (2)

fADC = 2 MHz

1.1

2.5

fADC = 4 MHz

1.5

fADC = 6 MHz

1.8

|EG|

Gain error (2)

fADC = 2 MHz

1.5

fADC = 4 MHz

2.1

fADC = 6 MHz

2.2

|ED|

Differential linearity error (2)

fADC = 2 MHz

0.7

1.5

fADC = 4 MHz

0.7

1.5

fADC = 6 MHz

0.7

1.5

|EL|

Integral linearity error (2)

fADC = 2 MHz

0.6

1.5

fADC = 4 MHz

0.8

fADC = 6 MHz

0.8

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