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M34E02-F Scheda tecnica(PDF) 20 Page - STMicroelectronics

Il numero della parte M34E02-F
Spiegazioni elettronici  Backward compatible with the M34C02
PDF  36 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M34E02-F Scheda tecnica(HTML) 20 Page - STMicroelectronics

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Use within a DDR1/DDR2/DDR3 DRAM module
M34E02-F
20/36
DocID10367 Rev 14
5.1.2
DRAM module inserted in the application motherboard
As the final application cannot drive the E0 pin to VHV, the only possible action is to freeze
the write-protection with the PSWP instruction.
Table 5 and Table 6 show how the Ack bits can be used to identify the write-protection
status.
Table 5. Acknowledge when writing data or defining the write-protection
(instructions with R/W bit = 0)
Status
WC
input
level
Instruction
Ack
Address
Ack
Data byte
Ack
Write
cycle
(tW)
Permanently
protected
X
PSWP, SWP or
CWP
NoAck
Not
significant
NoAck
Not
significant
NoAck
No
Page or Byte Write
in lower 128 bytes
Ack
Address
Ack
Data
NoAck
No
Protected
with SWP
SWP
NoAck
Not
significant
NoAck
Not
significant
NoAck
No
CWP
Ack
Not
significant
Ack
Not
significant
Ack
Yes
0
PSWP
Ack
Not
significant
Ack
Not
significant
Ack
Yes
Page or Byte Write
in lower 128 bytes
Ack
Address
Ack
Data
NoAck
No
SWP
NoAck
Not
significant
NoAck
Not
significant
NoAck
No
1
CWP
Ack
Not
significant
Ack
Not
significant
NoAck
No
PSWP
Ack
Not
significant
Ack
Not
significant
NoAck
No
Page or Byte Write
Ack
Address
Ack
Data
NoAck
No
Not
Protected
0
PSWP, SWP or
CWP
Ack
Not
significant
Ack
Not
significant
Ack
Yes
Page or Byte Write
Ack
Address
Ack
Data
Ack
Yes
1
PSWP, SWP or
CWP
Ack
Not
significant
Ack
Not
significant
NoAck
No
Page or Byte Write
Ack
Address
Ack
Data
NoAck
No



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